Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
---|---|---|---|---|---|---|
2006 | A 6-b 800-MS/s Pipelined A/D Converter with Open-loop Amplifiers | D-L Shen; TAI-CHENG LEE | IEEE Symposium on VLSI Circuits | 25 | ||
2007 | A 6-b 800-MS/s Pipelined A/D Converter with Open-Loop Amplifiers | D.-L. Shen; TAI-CHENG LEE | IEEE Journal of Solid-State Circuits | 28 | 25 | |
2008 | A 6-bit Pipelined Analog-to-Digital Converter with Current-Switching Open-Loop Residue Amplification | Feng-Chiu Hsieh; Tai-Cheng; TAI-CHENG LEE | IEEE Asian Solid-State Circuit Conference | |||
2014 | A 6-Gb/s Adaptive-Loop-Bandwidth Clock and Data Recovery (CDR) Circuits | L-H Chiueh; TAI-CHENG LEE | IEEE Asian Solid-State Circuit Conference | |||
2012 | A 6-GHz All Digital PLL for Spread Spectrum Clock Generators (SSCG) | C-D Su; C-W Lee; TAI-CHENG LEE | International Journal of Electrical Engineering | |||
2013 | A 6-GHz Self-Oscillating Spread-Spectrum Clock Generator | C-H Wong; TAI-CHENG LEE | IEEE Transactions on Circuits and Systems, Part I | 5 | ||
2008 | A clock and data recovery circuit with wide linear range frequency detector | K-J Hsiao; M-H Lee; TAI-CHENG LEE | IEEE VLSI-DAT | |||
2014 | A Compact Multi-Input Thermoelectric Energy Harvesting System with 58.5% Power Conversion Efficiency and 32.4-mW Output Power Capability | C-L Chang; TAI-CHENG LEE | International Symposium on Integrated Circuits | |||
2007 | A Delay-Line-Based GFSK Demodulator for Low-IF Receivers | H-S Kao; M-J Yang; TAI-CHENG LEE | International Solid-State Circuit Conference (ISSCC) | |||
2005 | A DLL-Based Frequency Multiplier For MBOA-UWB System | K-J Hsiao; TAI-CHENG LEE | IEEE Symposium on VLSI Circuits | 13 | 0 | |
2008 | A Fully Integrated 36MHz to 230MHz Multiplying DLL with Adaptive Current Tuning | K-J Hsiao; TAI-CHENG LEE | IEEE Journal of Solid-State Circuits | |||
2007 | A Fully Integrated 36MHz to 230MHz Multiplying DLL with Adaptive Current Tuning | K-J Hsiao; TAI-CHENG LEE | Symposium on VLSI Circuits | |||
2005 | A Linear-Approximation Technique for Digitally-Calibrated Pipelined ADCs | D. L. Shen; TAI-CHENG LEE | Proceedings - IEEE International Symposium on Circuits and Systems | 7 | 0 | |
2009 | A Low-Jitter 8GHz to 10GHz Distributed DLL for Multiple-Phase Clock Generation | K-J Hsian; TAI-CHENG LEE | IEEE Journal of Solid-State Circuits | |||
2005 | A Miller Divider Based Clock Generator for MBOA-UWB Application | TAI-CHENG LEE ; Y. C. Huang | IEEE Symposium on VLSI Circuits | |||
2006 | A Mixed-Signal GFSK Demodulator for Bluetooth | C.-C. Chen; TAI-CHENG LEE | IEEE Transactions on Circuits and Systems II: Express Briefs | 27 | 22 | |
2008 | A Multiphase Compensation Method with Dynamic Element Matching Technique in �U-�G Fractional-�P Frequency Synthesizers | Chen, Zuow-Zun; Lee, Tai-Cheng | Journal of Semiconductor Technology and Science | 0 | 0 | |
2015 | A Single-Channel 10-b 400-MS/s 8.7-mW Pipeline ADC in a 90-nm Technology | C-K Hsu; TAI-CHENG LEE | IEEE Asian Solid-State Circuit Conference | |||
2006 | A Spur-Suppression Technique for Phase-Locked Frequency Synthesizers | TAI-CHENG LEE ; W.-L. Lee | IEEE International Solid-State Circuit Conference (ISSCC) | |||
2001 | A Stabilization Technique for Phase-Locked Frequency Synthesizers | TAI-CHENG LEE ; B. Razavi | IEEE VLSI Circuits Symposium |