| Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
| 2016 | SEMICO NDUCTO R DEVICE AND METHOD OF FORMAT ION | M. H.Liao | | | | |
| 2018 | Semicond uctor device and method of formation | 廖洛漢 | | | | |
| 2016 | Shallow trench isolation geometric influence of a recessed surface on array-type arrangements of nano-scaled devices strained by contact etch stop liner and Ge-based stressors | Hsieh, C.-P.; Liao, M.-H.; Lee, C.-C.; Cheng, T.-C.; Wang, C.-P.; Huang, P.-C.; Cheng, S.-W.; MING-HAN LIAO | Thin Solid Films | 0 | 0 | |
| 2011 | Si/SiGe hetero-junction solar cell with optimization design and theoretical analysis | Chang, S.T.; Liao, M.H.; Lin, W.-K.; MING-HAN LIAO | Thin Solid Films | 26 | 24 | |
| 2011 | Si/SiGe hetero-junction solar cell with optimization design and theoretical analysis | Chang, S. T.; Liao, M. H.; Lin, W.-K.; MING-HAN LIAO | Thin Solid Films | 26 | 24 | |
| 2008 | SiGe/Si quantum-dot infrared photodetectors with δ doping | Lin, C.-H.; Yu, C.-Y.; Chang, C.-C.; Lee, C.-H.; Yang, Y.-J.; Ho, W.S.; Chen, Y.-Y.; Liao, M.H. ; Cho, C.-T.; Peng, C.-Y.; Liu, C.W. | IEEE Transactions on Nanotechnology | 5 | 6 | |
| 2016 | Simulation-based study of negative-capacitance double-gate tunnel field-effect transistor with ferroelectric gate stack | Liu, C.; Chen, P.-G.; Xie, M.-J.; Liu, S.-N.; Lee, J.-W.; Huang, S.-J.; Liu, S.; Chen, Y.-S.; Lee, H.-Y.; Liao, M.-H. ; Chen, P.-S.; Lee, M.-H. | Japanese Journal of Applied Physics | 12 | 8 | |
| 2013 | Solar cell composed of periodic nano-structure and SiGe/Si thin film | Hsieh, C.-F.; Wu, H.-S.; Wu, T.-C.; Liao, M.H. | Conference Record of the IEEE Photovoltaic Specialists Conference | 0 | 0 | |
| 2013 | The special trench design near the through silicon vias (TSVs) to reduce the keep-out zone for application in three-dimensional integral circuits | Liao, M.-H.; MING-HAN LIAO | Journal of Physics D: Applied Physics | 2 | 2 | |
| 2018 | Steep switch-off of In <inf>0.18</inf> Al <inf>0.82</inf> N/AlN/GaN on Si MIS-HEMT | Chen, P.-G.; Chou, Y.-C.; Gu, S.-S.; Hong, R.-C.; Wang, Z.-Y.; Chen, S.-Y.; Liao, C.-Y.; Tang, M.,; Liao, M.-H. ; Lee, M.H. | 2018 7th International Symposium on Next-Generation Electronics | 0 | 0 | |
| 2016 | STI Geometric Influence of a Recessed Surface on Array-type Arrangements of Nano-scaled Devices Strained by CESL and Ge-based Stressors | M. H.Liao ; C. C. Lee; C.-P. Hsieh; P.-C. Huang; S.-W. Cheng | Thin Solid Films | | | |
| 2016 | STI stress modulation with additional implantati on and natural pad sin mask | M. H.Liao ; T.L. Lee; L.-Y.Yeh; M.S.Liang | | | | |
| 2010 | Strain engineering of nanoscale Si MOS devices | Huang, J.; Chang, S.-T.; Hsieh, B.-F.; Liao, M.-H.; Wang, W.-C.; Lee, C.-C.; MING-HAN LIAO | Thin Solid Films | 4 | 4 | |
| 2006 | Strained Pt Schottky diodes on n-type Si and Ge | Liao, M.H. ; Chang, S.T.; Kuo, P.S.; Wu, H.-T.; Peng, C.-Y.; Liu, C.W. | Third International SiGe Technology and Device Meeting | 0 | | |
| 2014 | Stress and curvature of periodic trench structures on Sapphire substrate with GaN film | Hsieh, C.F.; Chen, C.W.; Chen, C.H.; Liao, M.H. | Procedia Engineering | 0 | 0 | |
| 2013 | Studies of boron diffusivities on (001) and (110) substrate orientation in Si and Ge along vertical/out-of plane and lateral/in-plane directions study | M. H.Liao | Thin Solid Films | | | |
| 2015 | Sub-60mV-Swing Negative-Capacitance FinFET without Hysteresis | M. H.Liao ; K. S. Li; P.-G. Chen; T. Y. Lai; C. H. Lin; C.-C. Cheng; C. C. Chen; M. H. Lee; M. C. Chen; J. M. Sheih; W. K. Yeh; F. L. Yang; Sayeef Salahuddin; Chenming Hu | IEEE Electron Device Meeting | 125 | 0 | |
| 2018 | Sub-60mV/dec Subthreshold Swing on Reliability of Ferroelectric HfZrOx Negative-Capacitacne FETs with DC Sweep and AC Stress Cycles | M. H.Liao ; K.-T. Chen; C.-Y. Liao; R.-C. Hong; S.-S. Gu; Y.-C. Chou; Z.-Y. Wang; S.-Y.Chen; G.-Y. Siang; H.-Y. Chen; C. Lo; P.-G. Chen; Y.-J. Lee; K.-S.Li; S. T. Chang; M. H. Lee | 2018 International Conference on Solid State Devices and Materials | | | |
| 2008 | Superior n-MOSFET performance by optimal stress design | Liao, M.H. ; Yeh, L.; Lee, T.-L.; Liu, C.W.; Liang, M.-S. | IEEE Electron Device Letters | 15 | 12 | |
| 2007 | Superior n-MOSFET performance by optimal stress design | Yang, Y.-J.; Liao, M.H. ; Liu, C.W.Yeh, L., Lee, T.-L., Liang, M.-S. | 2007 International Semiconductor Device Research Symposium | 1 | 0 | |
