公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2004 | A design flow for multiplierless linear-phase fir filters: From system specification to verilog code | AN-YEU(ANDY) WU ; Jheng, K.-Y.; Jou, S.-J.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | | | |
2005 | A DVB-T baseband demodulator design based on multimode silicon IPs | AN-YEU(ANDY) WU ; Jheng, K.-Y.; Wu, T.-H.; Wang, Y.-C.; Yeo, J.-C.; Cho, Y.-J.; AN-YEU(ANDY) WU | 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test | | | |
2004 | A fast and power-saving self-timed manchester carry-bypass adder for booth multiplier-accumulator design | AN-YEU(ANDY) WU ; Wey, I.-C.; Chow, H.-C.; Chen, Y.-G.; AN-YEU(ANDY) WU | 2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits | | | |
2003 | A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes | AN-YEU(ANDY) WU ; Wu, Cheng-Shing; Wu, An-Yeu; Lin, Chih-Hsiu; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing | | | |
2005 | A high-speed scalable shift-register based on-chip serial communication design for SoC applications | AN-YEU(ANDY) WU ; Wey, I.-C.; Chen, Y.-G.; Wu, C.-T.; Wang, W.; AN-YEU(ANDY) WU | 2005 PhD Research in Microelectronics and Electronics | | | |
2006 | A low cost packet detector in OFDM-based ultra-wideband systems | AN-YEU(ANDY) WU ; Lai, J.-T.; Chu, N.-Y.; Wu, A.-Y.; Chen, W.-C.; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation | | | |
2012 | A low-complexity grouping FFT-based codebook searching algorithm in LTE system | AN-YEU(ANDY) WU ; Lin, Y.-H.; Zhan, C.-Z.; Chu, C.-Y.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | | | |
2005 | A memory-reduced Log-MAP kernel for turbo decoder | AN-YEU(ANDY) WU ; Tsai, T.-H.; Lin, C.-H.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | | | |
2007 | A new binomial mapping and optimization algorithm for reduced-complexity mesh-based on-chip network | AN-YEU(ANDY) WU ; Shen, W.-T.; Chao, C.-H.; Lien, Y.-K.; AN-YEU(ANDY) WU | NOCS 2007: First International Symposium on Networks-on-Chip | | | |
2006 | A new early termination scheme of iterative turbo decoding using decoding threshold | AN-YEU(ANDY) WU ; Li, F.-M.; Lin, C.-H.; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation | | | |
2006 | A new noise-tolerant dynamic circuit design with enhanced PDP performance under low SNR environment | AN-YEU(ANDY) WU ; Chen, Y.-G.; Wey, I.-C.; AN-YEU(ANDY) WU | 2006 IEEE Asian Solid-State Circuits Conference | | | |
2002 | A novel cost-effective multi-path adaptive interpolated FIR (IFIR)-based echo canceller | AN-YEU(ANDY) WU ; Wu, C.-S.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | | | |
2003 | A novel echo cancellation algorithm and architecture based on multi-part adaptive interpolated FIR filter | AN-YEU(ANDY) WU ; Wu, C.-S.B.; AN-YEU(ANDY) WU | Journal of the Chinese Institute of Electrical Engineering, Transactions of the Chinese Institute of Engineers, Series E/Chung KuoTien Chi Kung Chieng Hsueh K'an | | | |
2003 | A novel multipath matrix algorithm for exact room response identification in stereo echo cancellation | AN-YEU(ANDY) WU ; Lai, J.-T.; Wu, A.-Y.; Yeh, C.-C.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | | | |
2001 | A novel Trellis-based searching scheme for EEAS-based CORDIC algorithm | AN-YEU(ANDY) WU ; Wu, C.-S.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | | | |
2007 | A power-aware reconfigurable rendering engine design with 453MPixels/s, 16.4MTriangles/s performance | AN-YEU(ANDY) WU ; Chao, C.-H.; Kuo, Y.-L.; Wu, A.-Y.; Chien, W.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | | | |
2009 | A real-time programmable LDPC decoder chip for arbitrary QC-LDPC parity check matrices | AN-YEU(ANDY) WU ; Shih, X.-Y.; Zhan, C.-Z.; AN-YEU(ANDY) WU | 2009 IEEE Asian Solid-State Circuits Conference, A-SSCC 2009 | | | |
2006 | A robust band-tracking packet detector (BT-PD) in OFDM-based ultra-wideband systems | AN-YEU(ANDY) WU ; Lai, J.-T.; Chu, N.-Y.; Wu, A.-Y.; Chen, W.-C.; AN-YEU(ANDY) WU | 2006 IEEE Workshop on Signal Processing Systems Design and Implementation | | | |
2009 | A scalable built-in self-test/self-diagnosis architecture for 2D-mesh based chip multiprocessor systems | AN-YEU(ANDY) WU ; Lin, S.-Y.; Hsu, C.-C.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | | | |
2005 | A scalable DCO design for portable ADPLL designs | AN-YEU(ANDY) WU ; Wu, C.-T.; Wang, W.; Wey, I.-C.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | | | |