公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2010 | Generalized pipelined Tomlinson - Harashima precoder design methodology with build-in arbitrary speed-up factors | Chen, Y.-L.; Wu, A.-Y.; AN-YEU(ANDY) WU | IEEE Transactions on Signal Processing | 4 | 4 | |
2010 | Generalized Pipelined Tomlinson–Harashima Precoder Design Methodology With Build-In Arbitrary Speed-Up Factors | Yen-Liang Chen; An-Yeu Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transaction on Signal Processing | 4 | 4 | |
2015 | High performance adaptive routing for Network-on-Chip systems with express highway mechanism | Lin, S.-C.; Chang, E.-J.; Chen, Y.-Y.; Hsin, H.-K.; Wu, A.-Y.A.; AN-YEU(ANDY) WU | IEEE Asia-Pacific Conference on Circuits and Systems | 1 | 0 | |
2009 | High-convergence-speed low-computation-complexity SVD algorithm for MIMO-OFDM systems | Zhan, C.-Z.; Jheng, K.-Y.; Chen, Y.-L.; Jheng, T.-J.; Wu, A.-Y.; AN-YEU(ANDY) WU | 2009 International Symposium on VLSI Design, Automation and Test, VLSI-DAT '09 | 10 | 0 | |
2002 | High-performance adaptive decision feedback equalizer based on predictive parallel branch slicer scheme | Yang, Meng-Da; Wu, An-Yeu | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 0 | 0 | |
2008 | High-performance scheduling algorithm for partially parallel LDPC decoder | Zhan, C.-Z.; Shih, X.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | 4 | 0 | |
2004 | High-Performance VLSI Architecture of Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer (PPBS) Scheme | Yang, M.-D.; Wu, A.-Y.; Lai, J.-T.; AN-YEU(ANDY) WU | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 3 | 3 | |
2004 | High-Performance VLSI Architecture of Adaptive Decision Feedback Equalizer Based on Predictive Parallel Branch Slicer (PPBS) Scheme | Meng-Da Yang; An-Yeu Wu; Jyh-Ting (Justin) Lai; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 3 | 3 | |
2006 | High-Performance VLSI Architecture of Decision Feedback Equalizer for Gigabit Systems | Chih-Hsiu Lin; An-Yeu Wu; Fan-Min Li; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Trans. Circuits and Systems, Part-II: Express Briefs | 22 | 18 | |
2006 | High-performance VLSI architecture of decision feedback equalizer for gigabit systems | Lin, C.-H.; Wu, A.-Y.; Li, F.-M.; AN-YEU(ANDY) WU | IEEE Transactions on Circuits and Systems II: Express Briefs | 22 | 18 | |
2003 | A High-performance/Low-latency Vector Rotational CORDIC Architecture Based on Extended Elementary Angle Set and Trellis-based Searching Schemes | Cheng-Shing Wu; An-Yeu Wu; Chih-Hsiu (Zhi-Xiu) Lin; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Transactions on Circuits and Systems Part II: Analog and Digital Signal Processing | 64 | 42 | |
2008 | High-throughput 12-mode CTC decoder for WiMAX standard | Lin, C.-H.; Chen, C.-Y.; Wu, A.-Y.; AN-YEU(ANDY) WU | 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT | 10 | 0 | |
2008 | High-throughput dual-mode single/double binary map processor design for wireless wan | Chen, C.-Y.; Lin, C.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU | IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation | 3 | 0 | |
2014 | High-throughput QC-LDPC decoder with cost-effective early termination scheme for non-volatile memory systems | Lin, Y.-M.; Chen, Y.-H.; Chung, M.-H.; Wu, A.-Y.; AN-YEU(ANDY) WU | IEEE International Symposium on Circuits and Systems | 3 | 0 | |
2015 | http://access.ee.ntu.edu.tw/Publications/Conference/CA136_2015.pdf | AN-YEU(; Y) WU; AN-YEU(ANDY) WU | | | | |
2013 | Hybrid path-diversity-aware adaptive routing with latency prediction model in Network-on-Chip systems | Tsai, P.-A.; Kuo, Y.-H.; Chang, E.-J.; Hsin, H.-K.; Wu, A.-Y.; AN-YEU(ANDY) WU | 2013 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 2013 | 12 | 0 | |
2014 | Hydra: An energy-efficient programmable cryptographic coprocessor supporting elliptic-curve pairings over fields of large characteristics | Chang, Y.-A.; Hong, W.-C.; Hsiao, M.-C.; Yang, B.-Y.; Wu, A.-Y.; Cheng, C.-M.; CHEN-MOU CHENG ; AN-YEU(ANDY) WU | Lecture Notes in Computer Science | 1 | 0 | |
2021 | Hyperdimensional Computing with Learnable Projection for User Adaptation Framework | AN-YEU(ANDY) WU | IFIP Advances in Information and Communication Technology | 2 | 0 | |
2019 | Hyperdimensional Computing-based Multimodality Emotion Recognition with Physiological Signals | En-Jui Chang; Abbas Rahimi; Luca Benini; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE International Symposium on AI for Circuits and Systems (AICAS-2019) | | | |
2019 | Hyperdimensional Computing-based Multimodality Emotion Recognition with Physiological Signals. | Chang, En-Jui; Rahimi, Abbas; Benini, Luca; Wu, An-Yeu Andy; AN-YEU(ANDY) WU | IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019, Hsinchu, Taiwan, March 18-20, 2019 | 47 | 0 | |