公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2006 | Placement of digital microfluidic biochips using the t-tree formulation | Yuh, P.-H.; Yang, C.-L.; CHIA-LIN YANG ; YAO-WEN CHANG | Proceedings - Design Automation Conference | 44 | 0 | |
2010 | PM-COSYN: PE and memory co-synthesis for MPSoCs | CHIA-LIN YANG ; Chen, Y.-J.; Yang, C.-L.; Wang, P.-H.; CHIA-LIN YANG | Design, Automation and Test in Europe | | | |
2010 | PM-COSYN: PE and memory co-synthesis for MPSoCs. | Chen, Yi-Jung; Yang, Chia-Lin; Wang, Po-Han; CHIA-LIN YANG | Design, Automation and Test in Europe, DATE 2010, Dresden, Germany, March 8-12, 2010 | | | |
2007 | Post Placement Leakage Optimization for Partially Dynamic Reconfigurable FPGAs | Li, Chi-Feng; Yuh, Ping-Hung; Yang, Chia-Lin ; CHIA-LIN YANG | International Symposium on Low Power Electronics and Design | 7 | 0 | |
2011 | Power gating strategies on GPUs | CHIA-LIN YANG ; Wang, P.-H.; Yang, C.-L.; Chen, Y.-M.; Cheng, Y.-J.; CHIA-LIN YANG | Transactions on Architecture and Code Optimization | | | |
2003 | A power-aware SWDR cell for reducing cache write power. | Chang, Yen-Jen; Yang, Chia-Lin; Lai, Feipei; CHIA-LIN YANG | Proceedings of the 2003 International Symposium on Low Power Electronics and Design, 2003, Seoul, Korea, August 25-27, 2003 | | | |
2009 | PPT: Joint performance/power/thermal management of DRAM memory for multi-core systems | Lin, C.-H.; Yang, C.-L.; CHIA-LIN YANG | International Symposium on Low Power Electronics and Design | 22 | 0 | |
2004 | Profit-Driven Uniprocessor Scheduling with Energy and Timing Constraints | Chen, Jian-Jia; Kuo, Tei-Wei ; Yang, Chia-Lin | 2004 ACM symposium on Applied computing | | | |
2004 | Profit-driven uniprocessor scheduling with energy and timing constraints. | Chen, Jian-Jia; Kuo, Tei-Wei; CHIA-LIN YANG ; TEI-WEI KUO | Proceedings of the 2004 ACM Symposium on Applied Computing (SAC), Nicosia, Cyprus, March 14-17, 2004 | 17 | 0 | |
2002 | A programmable memory hierarchy for prefetching linked data structures | Yang, C.-L.; Lebeck, A.; CHIA-LIN YANG | Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics) | | | |
2002 | A Programmable Memory Hierarchy for Prefetching Linked Data Structures. | Yang, Chia-Lin; Lebeck, Alvin R.; CHIA-LIN YANG | High Performance Computing, 4th International Symposium, ISHPC 2002, Kansai Science City, Japan, May 15-17, 2002, Proceedings | | | |
2008 | A progressive-ILP based routing algorithm for cross-referencing biochips. | Yuh, Ping-Hung; Sapatnekar, Sachin S.; Yang, Chia-Lin; CHIA-LIN YANG ; YAO-WEN CHANG | Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008 | 0 | 0 | |
2022 | PUMP: Profiling-free Unified Memory Prefetcher for Large DNN Model Support | Lin C.-H; Lin S.-F; Chen Y.-J; Jenp E.-Y; CHIA-LIN YANG | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC | 0 | 0 | |
2000 | Push vs. pull: Data movement for linked data structures | CHIA-LIN YANG ; Yang, Chia-Lin; Lebeck, Alvin R.; CHIA-LIN YANG | International Conference on Supercomputing | | | |
2000 | Push vs. pull: data movement for linked data structures. | Yang, Chia-Lin; Lebeck, Alvin R.; CHIA-LIN YANG | Proceedings of the 14th international conference on Supercomputing, ICS 2000, Santa Fe, NM, USA, May 8-11, 2000 | | | |
2017 | Recap of the 2017 International Symposium on Low Power Electronics and Design (ISLPED) | Garrett, D.; CHIA-LIN YANG | IEEE Design and Test | 0 | 0 | |
2005 | Reconfigurable platform for content science research | LIANG-GEE CHEN ; TEI-WEI KUO ; YAO-WEN CHANG ; SHAO-YI CHIEN ; CHIA-LIN YANG ; CHI-SHENG SHIH ; Ku, Mong-Kai | 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications | 0 | 0 | |
2023 | Reliable Brain-inspired AI Accelerators using Classical and Emerging Memories | Yayla, Mikail; Thomann, Simon; Islam, Md Mazharul; Wei, Ming Liang; Ho, Shu Yin; Aziz, Ahmedullah; CHIA-LIN YANG ; Chen, Jian Jia; Amrouch, Hussam | Proceedings of the IEEE VLSI Test Symposium | 0 | 0 | |
2022 | RM-SSD: In-Storage Computing for Large-Scale Recommendation Inference | Sun X; Wan H; Li Q; CHIA-LIN YANG ; TEI-WEI KUO ; Xue C.J. | Proceedings - International Symposium on High-Performance Computer Architecture | 9 | 0 | |
2021 | Robust Brain-Inspired Computing: On the Reliability of Spiking Neural Network Using Emerging Non-Volatile Synapses | Wei M.-L; Amrouch H; Sung C.-L; Lue H.-T; Yang C.-L; Wang K.-C; Lu C.-Y.; CHIA-LIN YANG | IEEE International Reliability Physics Symposium Proceedings | | | |