公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
---|---|---|---|---|---|---|
2017 | Variation-Aware Reliable Many-Core System Design by Exploiting Inherent Core Redundancy | Huai-Ting Li; Ching-Yao Chou; Yuan-Ting Hsieh; Wei-Ching Chu; An-Yeu (Andy) Wu; AN-YEU(ANDY) WU ; 吳安宇 | IEEE Trans. Very Large Scale Integration (VLSI) Systems (TVLSI) | 8 | 8 |