公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2001 | The Ras/PKA signaling pathway of Saccharomyces cerevisiae exhibits a functional interaction with the Sin4p complex of the RNA polymerase II holoenzyme | Howard, S. C.; Chang, Y.-W.; Budovskaya, Y.V.; Herman, P. K. | Genetics | | | |
2016 | Recent research development and new challenges in analog layout synthesis | Lin, M.P.-H.; Chang, Y.-W.; Hung, C.-M.; YAO-WEN CHANG | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC | 43 | 0 | |
2007 | Reconfigurable architecture for video applications | Lian Jr.; C.; Tseng, P.-C.; Chen, T.-C.; Chang, Y.-W.; Chen, L.-G.; LIANG-GEE CHEN | 20th Anniversary IEEE International SOC Conference | 0 | 0 | |
2003 | Rectilinear block placement using B*-trees | Wu, G.-M.; Chang, Y.-C.; Chang, Y.-W.; YAO-WEN CHANG | ACM Transactions on Design Automation of Electronic Systems | 25 | 21 | |
2016 | Redistribution layer routing for integrated fan-out wafer-level chip-scale packages | Lin, B.-Q.; Lin, T.-C.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 12 | 0 | |
2010 | Redundant-wires-aware ECO timing and mask cost optimization | Fang, S.-Y.; Chien, T.-F.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 15 | 0 | |
2005 | Rlc coupling-Aware simulation for on-chip buses and their encoding for delay reduction | Tu, S.-W.; Jou, J.-Y.; Chang, Y.-W.; YAO-WEN CHANG | IEEE International Symposium on Circuits and Systems | 6 | 0 | |
2004 | RLC effects on worst-case switching pattern for on-chip buses | Tu, S.-W.; Jou, J.-Y.; Chang, Y.-W.; YAO-WEN CHANG | IEEE International Symposium on Circuits and Systems | 10 | | |
2008 | Roles of cis- and trans-changes in the regulatory evolution of genes in the gluconeogenic pathway in yeast | YA-WEN CHANG ; Chang, Y.-W.; Liu, F.-G. R.; Yu, N.; Sung, H.-M.; Yang, P.; Wang, D.; Huang, C.-J.; Shih, M.-C.; Li, W.-H. | Molecular Biology and Evolution | 13 | 13 | |
2008 | Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs | Jiang, Z.-W.; Su, B.-Y.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 37 | 0 | |
2011 | Routability-driven analytical placement for mixed-size circuit designs | Hsu, M.-K.; Chou, S.; Lin, T.-H.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 63 | 0 | |
2013 | Routability-driven placement for hierarchical mixed-size circuit designs | Hsu, M.-K.; Chen, Y.-F.; Huang, C.-C.; Chen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 27 | 0 | |
2008 | Routing for chip-package-board co-design considering differential pairs | Fang, J.-W.; Ho, K.-H.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 22 | 0 | |
2009 | Routing for manufacturability and reliability | Chen, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG | IEEE Circuits and Systems Magazine | 8 | 8 | |
2015 | Routing-architecture-aware analytical placement for heterogeneous FPGAS | Chen, S.-Y.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 18 | 0 | |
2001 | The rye mutants identify a role for Ssn/Srb proteins of the RNA polymerase II holoenzyme during stationary phase entry in S. cerevisiae | Chang, Y.-W.; Howard, S. C.; Budovskaya, Y. V.; Rine, J.; Herman, P. K. | Genetics | | | |
2019 | Scientific collaboration in institutes of chemical engineering in Taiwan during the declining research manpower | Cheng, T.-W.; Chang, Y.-W.; YU-WEI CHANG | 17th International Conference on Scientometrics and Informetrics, ISSI 2019 - Proceedings | 0 | | |
2014 | Secure support vector machines outsourcing with random linear transformation | Lin, K.-P.; Chang, Y.-W.; Chen, M.-S.; MING-SYAN CHEN | Knowledge and Information Systems | 10 | 10 | |
2012 | Self-interaction correction to GW approximation | Chang, Y.-W.; BIH-YAW JIN ; YAO-WEN CHANG | Physica Scripta | 4 | 4 | |
2008 | Sensitivity-based multiple-Vt cell swapping for leakage power reduction | Lee, W.-P.; Liu, H.-Y.; Ho, K.-H.; Chang, Y.-W.; YAO-WEN CHANG | 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT | 1 | 0 | |