公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
1996 | Fast performance-driven optimization for buffered clock trees based on Lagrangian relaxation | Chen, Chung-Ping; Chang, Yao-Wen; Wong, D.F.; YAO-WEN CHANG | Design Automation Conference | 24 | | |
1995 | FPGA global routing based on a new congestion metric | Wong, D.F.; Wong, C.K.; YAO-WEN CHANG | IEEE International Conference on Computer Design: VLSI in Computers and Processors | 13 | | |
1997 | Graph-theoretic sufficient condition for FPGA/FPIC switch-module routability | Wong, D.F.; Wong, C.K.; YAO-WEN CHANG | IEEE International Symposium on Circuits and Systems | 0 | | |
1994 | New global routing algorithm for FPGAs | Chang, Yao-Wen; Thakur, Shashidhar; Zhu, Kai; Wong, D.F.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 13 | | |
1996 | On a new timing-driven routing tree problem | Wong, D.F.; Zhu, Kai; Wong, C.K.; YAO-WEN CHANG | Proceedings - IEEE International Symposium on Circuits and Systems | 2 | | |
1993 | Switch module design with application to two-dimensional segmentation design | Zhu, Kai; Wong, D.F.; Chang, Yao-Wen; YAO-WEN CHANG | | 15 | | |
2000 | Timing-driven routing for symmetrical array-based FPGAs | Zhu, K.; Wong, D.F.; YAO-WEN CHANG | ACM Transactions on Design Automation of Electronic Systems | 23 | 20 | |
1998 | Timing-driven routing for symmetrical-array-based FPGAs | Zhu, Kai; Chang, Yao-Wen; Wong, D.F.; YAO-WEN CHANG | IEEE International Conference on Computer Design: VLSI in Computers and Processors | 10 | | |
1996 | Universal switch modules for fpga design | Wong, D.F.; Wong, C.K.; YAO-WEN CHANG | ACM Transactions on Design Automation of Electronic Systems | 103 | | |
1996 | Universal switch-module design for symmetric-array-based FPGAs | Wong, D.F.; Wong, C.K.; YAO-WEN CHANG | ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA | 20 | 0 | |