| Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
| 2007 | 124 MSamples/s pixel-pipelined motion-JPEG 2000 codec without tile memory | Chang, Y.-W.; Cheng, C.-C.; Chen, C.-C.; Fang, H.-C.; Chen, L.-G.; LIANG-GEE CHEN | IEEE Transactions on Circuits and Systems for Video Technology | 8 | 6 | |
| 2020 | A 28 GHz linear and efficient power amplifier supporting wideband OFDM for 5G in 28nm CMOS | Chang, Y.-W.; Tsai, T.-C.; Zhong, J.-Y.; Tsai, J.-H.; TIAN-WEI HUANG | IEEE MTT-S International Microwave Symposium Digest | 13 | 0 | |
| 2007 | 3D video applications and intelligent video surveillance camera and its VLSI design | Chien, S.-Y.; Shih, C.-S.; Ku, M.-K.; Yang, C.-L.; Chang, Y.-W.; Kuo, T.-W.; Chen, L.-G.; SHAO-YI CHIEN | 2007 IEEE International Conference on Multimedia and Expo, ICME 2007 | | | |
| 2007 | 3D video applications and intelligent video surveillance camera and its VLSI design | Chien, S.-Y.; Shih, C.-S.; Ku, M.-K.; Yang, C.-L.; Chang, Y.-W.; Kuo, T.-W.; Chen, L.-G.; LIANG-GEE CHEN | 2007 IEEE International Conference on Multimedia and Expo, ICME 2007 | | | |
| 2007 | 3D video applications and intelligent video surveillance camera and its VLSI design | Chien, S.-Y.; Shih, C.-S.; Ku, M.-K.; Yang, C.-L.; Chang, Y.-W.; Kuo, T.-W.; Chen, L.-G.; YAO-WEN CHANG | 2007 IEEE International Conference on Multimedia and Expo, ICME 2007 | 0 | | |
| 2003 | 81MS/s JPEG 2000 single-chip encoder with rate-distortion optimization | Fang, H.-C.; Huang, C.-T.; Chang, Y.-W.; Wang, T.-C.; Tseng, P.-C.; Lian, C.-J.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Solid-State Circuits Conference | | | |
| 2004 | 81MS/s JPEG2000 single-chip encoder with rate-distortion optimization | Fang, H.-C.; Huang, C.-T.; Chang, Y.-W.; Wang, T.-C.; Tseng, P.-C.; Lian, C.-J.; Chen, L.-G.; LIANG-GEE CHEN | IEEE International Solid-State Circuits Conference | | | |
| 2008 | A 100 MHZ 1920×1080 HD-photo 20 frames/sec JPEG XR encoder design | Chien, C.-Y.; Huang, S.-C.; Lin, S.-H.; Huang, Y.-C.; Chen, Y.-C.; Chou, L.-C.; Chuang, T.-D.; Chang, Y.-W.; Pan, C.-H.; Chen, L.-G.; LIANG-GEE CHEN | International Conference on Image Processing, ICIP | 3 | 0 | |
| 2012 | A chip-package-board co-design methodology | Lee, H.-C.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 4 | 0 | |
| 2011 | A corner stitching compliant B-tree representation and its applications to analog placement | Tsao, H.-F.; Chou, P.-Y.; Huang, S.-L.; Chang, Y.-W.; Lin, M.P.-H.; Chen, D.-P.; Liu, D.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 23 | 0 | |
| 2003 | A Fast Crosstalk- and Performance-Driven Multilevel Routing System | Ho, T.-Y.; Chang, Y.-W.; Chen, S.-J.; Lee, D.T.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 46 | | |
| 2006 | A high-quality mixed-size analytical placer considering preplaced blocks and density constraints | Chen, T.-C.; Jiang, Z.-W.; Hsu, T.-C.; Chen, H.-C.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 62 | 0 | |
| 2007 | A network-flow-based RDL routing algorithmz for flip-chip design | Fang, J.-W.; Lin, I.-J.; Chang, Y.-W.; Wang, J.-H.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 59 | 44 | |
| 2014 | A new asynchronous pipeline template for power and performance optimization | Ho, K.-H.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 8 | 0 | |
| 2008 | A new multilevel framework for large-scale interconnect-driven floorplanning | Chen, T.-C.; Chang, Y.-W.; Lin, S.-C.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 28 | 24 | |
| 2006 | A novel framework for multilevel full-chip gridless routing | Chen, T.-C.; Chang, Y.-W.; Lin, S.-C.; YAO-WEN CHANG | Asia and South Pacific Design Automation Conference, ASP-DAC | 14 | | |
| 2002 | A novel framework for multilevel routing considering routability and performance | Lin, S.-P.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 55 | 0 | |
| 2009 | A novel hot-electron programming method in a buried diffusion bit-line SONOS memory by utilizing nonequilibrium charge transport | Wang, T.; Tang, C.-J.; Li, C.-W.; Lee, C.-H.; Ou, T.-F.; Chang, Y.-W.; Tsai, W.-J.; Lu, T.-C.; Chen, K.-C.; Lu, C.-Y.; YAO-WEN CHANG | IEEE Electron Device Letters | 0 | 0 | |
| 2014 | A novel layout decomposition algorithm for triple patterning lithography | Fang, S.-Y.; Chang, Y.-W.; Chen, W.-Y.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 46 | 43 | |
| 2012 | A novel layout decomposition algorithm for triple patterning lithography | Fang, S.-Y.; Chang, Y.-W.; Chen, W.-Y.; YAO-WEN CHANG | Design Automation Conference | 47 | 0 | |
