公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2012 | A built-in characterization technique for 1-bit/stage pipelined ADC | Chou, Y.-H.; Huang, J.-L.; Huang, X.-L.; JIUN-LANG HUANG | Proceedings of the Asian Test Symposium | 0 | 0 | |
2009 | A DfT Technique for Diagnosing Integrator Leakage of Single-Bit First-Order Delta-Sigma Modulator Using DC Input | Huang, X.-L.; Yang, C.-Y.; Huang, J.-L. | International Journal of Electrical Engineering | | | |
2009 | Diagnosing integrator leakage of single-bit first-order Δσ modulator using DC input | Huang, X.-L.; Yang, C.-Y.; Huang, J.-L.; JIUN-LANG HUANG | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC | 2 | 0 | |
2011 | Histogram-based calibration of capacitor mismatch and comparator offset for 1-bit/stage pipelined ADCs | Huang, X.-L.; Kang, P.-Y.; Yu, Y.-C.; Huang, J.-L.; JIUN-LANG HUANG | Journal of Electronic Testing: Theory and Applications (JETTA) | 3 | 2 | |
2011 | On pre/post-bond testing and calibrating SAR ADC array in 3-D CMOS imager | Huang, X.-L.; Kang, P.-Y.; Huang, J.-L.; Chou, Y.-F.; Lee, Y.-P.; Kwai, D.-M.; JIUN-LANG HUANG | Proceedings - 2011 IEEE 17th International Mixed-Signals, Sensors and Systems Test Workshop, IMS3TW 2011 | 1 | 0 | |
2010 | A robust ADC code hit counting technique | Huang, J.-L.; Chou, K.-Y.; Lu, M.-H.; Huang, X.-L.; JIUN-LANG HUANG | Proceedings -Design, Automation and Test in Europe, DATE | 1 | | |
2012 | Testing and calibration of SAR ADCs by MCT-based bit weight extraction | Huang, X.-L.; Chen, H.-I.; Huang, J.-L.; Chen, C.-Y.; Kuo-Tsai, T.; Huang, M.-F.; Chou, Y.-F.; Kwai, D.-M.; JIUN-LANG HUANG | Proceedings of the 2012 IEEE 18th International Mixed-Signal, Sensors, and Systems Test Workshop, IMS3TW 2012 | 7 | 0 | |