公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
1995 | An efficient approach for via minimization in multi-layer VLSI/PCB routing | Cherng, Jong-Sheng; Chen, Sao-Jie ; Tsai, Chia-Chun; Ho, Jan-Ming | Custom Integrated Circuits Conference, 1995. | 0 | 0 | |
1999 | An automatic router for the pin grid array package | Chen, Shuenn-Shi; Chen, Jong-Jang; Chen, Sao-Jie ; Tsai, Chia-Chun | Asia and South Pacific Design Automation Conference, 1999. ASP-DAC '99 | 0 | 0 | |
1995 | Efficient approach for via minimization in multi-layer VLSI/PCB routing | Cherng, Jong-Sheng; Chen, Sao-Jie; Tsai, Chia-Chun; Ho, Jan-Ming; SAO-JIE CHEN | Custom Integrated Circuits Conference | | | |
2000 | Efficient routability check algorithms for segmented channel routing | Yang, Cheng-Hsing; Chen, Sao-Jie; Ho, Jan-Ming; Tsai, Chia-Chun | ACM Transactions on Design Automation of Electronic Systems | | | |
1993 | Efficient signal redistribution algorithm for MCM | Shiao, Ming-Fu; Changfan, Chieh; Chen, Sao-Jie; Tsai, Chia-Chun; SAO-JIE CHEN | Custom Integrated Circuits Conference | | | |
1999 | An efficient two-level partitioning algorithm for VLSI circuits | Cherng, Jong-Sheng; Chen, Soo-Jie; Tsai, Chia-Chun; Ho, Jan-Ming | Design Automation Conference, 1999. Proceedings of the ASP-DAC '99. Asia and South Pacific | 7 | 0 | |
1999 | An even wiring approach to the ball grid array package routing | Chen, Shuenn-Shi; Chen, Jong-Jang; Tsai, Chia-Chun; Chen, Sao-Jie | International Conference on Computer Design, 1999. (ICCD '99) | 0 | 0 | |
1999 | Even wiring approach to the ball grid array package routing | Chen, Shuenn-Shi; Chen, Jong-Jang; Tsai, Chia-Chun; Chen, Sao-Jie; SAO-JIE CHEN | IEEE International Conference on Computer Design: VLSI in Computers and Processors | | | |
1991 | GEAR: a general area router using planning approach | Chen, Yuh-Lin; SAO-JIE CHEN ; Tsai, Chia-Chun; Hu, Yu-Hen | International Symposium on VLSI Technology, Systems, and Applications, Proceedings | 0 | 0 | |
1991 | Hybrid routing on multichip modules | Tsai, Chia-Chun; Chen, Sao-Jie ; Hsiao, Pei-Yung; Feng, Wu-Shiung | Custom Integrated Circuits Conference | 0 | 0 | |
2006 | Inductance extraction for general interconnect structures | Lai, Chun-Ying; Jeng, Shyh-Kang ; Chang, Yao-Wen ; Tsai, Chia-Chun | International Symposium on Circuits and Systems, 2006. ISCAS '06 | 0 | 0 | |
1999 | A New Approach to the Ball Grid Array Package Routing | Chen, Shuenn-Shi; Chen, Jong-Jang; Lee, Trong-Yen; Tsai, Chia-Chun; Chen, Sao-Jie | IEICE Transactions on Fundamentals of Electronics | | | |
1995 | One-phase technology mapping for EPGAs using extended GBDD hash tables | Yang, Cheng-Hsing; Chen, Sao-Jie ; Ho, Jan-Ming; Tsai, Chia-Chun | 1995 International Sympsium on VLSI Technology, Systems and Applications | 0 | 0 | |
1996 | Planar routing in a pin grid array package | Tsai, Chia-Chun; Chen, Sao-Jie; SAO-JIE CHEN | Journal of the Chinese Institute of Electrical Engineering, Transactions of the Chinese Institute of Engineers, Series E/Chung KuoTien Chi Kung Chieng Hsueh K'an | | | |
2014 | 國民年金制度中納保對象變遷之研究-漸進式制度論觀點 | 蔡佳君; Tsai, Chia-Chun | | | | |