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  1. NTU Scholars
  2. Research Outputs

Browsing by Author Yang, C.-H.


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Showing results 1 to 20 of 119  next >
Issue DateTitleAuthor(s)SourcescopusWOSFulltext/Archive link
2020A 1.5£gJ/Task Path-Planning Processor for 2D/3D Autonomous Navigation of Micro RobotsChung, C.; Yang, C.-H.; CHIA-HSIANG YANG Digest of Technical Papers - IEEE International Solid-State Circuits Conference50
2020A 1.96 Gb/s Massive MU-MIMO Detector for Next-Generation Cellular SystemsWen, C.-C.; Lee, Y.-C.; Wu, Y.-C.; Kao, C.-C.; Yang, C.-H.; CHIA-HSIANG YANG IEEE Symposium on VLSI Circuits, Digest of Technical Papers40
2019A 12.6 mW, 573-2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological SignalsWang, Y.-Z.; Wang, Y.-P.; Wu, Y.-C.; Yang, C.-H.; CHIA-HSIANG YANG IEEE Journal of Solid-State Circuits55
2017A 135-mW Fully Integrated Data Processor for Next-Generation SequencingWu, Y.-C.; Chang, C.-H.; Hung, J.-H.; Yang, C.-H.; CHIA-HSIANG YANG IEEE Transactions on Biomedical Circuits and Systems1510
2020A 2.17-mw acoustic dsp processor with cnn-fft accelerators for intelligent hearing assistive devicesLee, Y.-C.; Chi, T.-S.; Yang, C.-H.; CHIA-HSIANG YANG IEEE Journal of Solid-State Circuits75
2019A 2.17mW Acoustic DSP Processor with CNN-FFT Accelerators for Intelligent Hearing Aided DevicesLee, Y.-C.; Chi, T.-S.; Yang, C.-H.; CHIA-HSIANG YANG Proceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 201960
2018A 2กั2-16กั16 Reconfigurable GGMD Processor for MIMO Communication SystemsChiang, C.-H.; Huang, S.-A.; Chen, C.-E.; Yang, C.-H.; CHIA-HSIANG YANG Proceedings - IEEE International Symposium on Circuits and Systems10
2017A 5.28-Gb/s LDPC Decoder With Time-Domain Signal Processing for IEEE 802.15.3c ApplicationsLi, M.-R.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG IEEE Journal of Solid-State Circuits1413
2005A 1.2V 6.7mW impulse-radio UWB baseband transceiverYang, C.-H.; Chen, K.-H.; Chiueh, T.-D.; CHIA-HSIANG YANG IEEE International Solid-State Circuits Conference 
2013A 10-Bit 200 MS/s capacitor-sharing pipeline ADCTseng, C.-J.; Hsieh, Y.-C.; Yang, C.-H.; Chen, H.-S.; HSIN-SHU CHEN IEEE Transactions on Circuits and Systems I: Regular Papers 97
2013A 191μW BPSK demodulator for data and power telemetry in biomedical implantsWang, L.-L.; Yang, C.-H.; Chiueh, H.; CHIA-HSIANG YANG ACM Great Lakes Symposium on VLSI, GLSVLSI 30
2009A 2.89mW 50GOPS 16 × 16 16-core MIMO sphere decoder in 90nm CMOSYang, C.-H.; Markovic, D.; CHIA-HSIANG YANG ESSCIRC 2009 - 35th European Solid-State Circuits Conference 140
2013A 28.6μW mixed-signal processor for epileptic seizure detectionChen, T.-J.; Lee, S.-C.; Yang, C.-H.; Chiu, C.-F.; Chiueh, H.; CHIA-HSIANG YANG IEEE Symposium on VLSI Circuits
2014A 5.4 μw soft-decision bch decoder for wireless body area networksYang, C.-H.; Huang, T.-Y.; Li, M.-R.; Ueng, Y.-L.; CHIA-HSIANG YANG IEEE Transactions on Circuits and Systems I: Regular Papers 1918
2010A 5.8mW 3GPP-LTE compliant 8×8 MIMO sphere decoder chip with soft-outputsYang, C.-H.; Yu, T.-H.; Markovi?, D.; CHIA-HSIANG YANG IEEE Symposium on VLSI Circuits140
2012A 7.4-mW 200-MS/s wideband spectrum sensing digital baseband processor for cognitive radiosYu, T.-H.; Yang, C.-H.; ?abri?, D.; Markovi?, D.; CHIA-HSIANG YANG IEEE Journal of Solid-State Circuits 2520
2011A 7.4mW 200MS/s wideband spectrum sensing digital baseband processor for cognitive radiosYu, T.-H.; Yang, C.-H.; ?abri?, D.; Markovi?, D.; CHIA-HSIANG YANG IEEE Symposium on VLSI Circuits
2011A 75μW, 16-channel neural spike-sorting processor with unsupervised clusteringKarkare, V.; Gibson, S.; Yang, C.-H.; Chen, H.; Markovi?, D.; CHIA-HSIANG YANG IEEE Symposium on VLSI Circuits
2015A 794Mbps 135mW iterative detection and decoding receiver for 4x4 LDPC-coded MIMO systems in 40nmWu, W.-H.; Sun, W.-C.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG IEEE Symposium on VLSI Circuits30
2016A 98.6μW acoustic signal processor for fully-implantable cochlear implantsLiu, H.-M.; Lin, Y.-J.; Lee, Y.-C.; Lee, C.-Y.; Yang, C.-H.; CHIA-HSIANG YANG 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016 50
Showing results 1 to 20 of 119  next >

臺大位居世界頂尖大學之列,為永久珍藏及向國際展現本校豐碩的研究成果及學術能量,圖書館整合機構典藏(NTUR)與學術庫(AH)不同功能平台,成為臺大學術典藏NTU scholars。期能整合研究能量、促進交流合作、保存學術產出、推廣研究成果。

To permanently archive and promote researcher profiles and scholarly works, Library integrates the services of “NTU Repository” with “Academic Hub” to form NTU Scholars.

總館學科館員 (Main Library)
醫學圖書館學科館員 (Medical Library)
社會科學院辜振甫紀念圖書館學科館員 (Social Sciences Library)

開放取用是從使用者角度提升資訊取用性的社會運動,應用在學術研究上是透過將研究著作公開供使用者自由取閱,以促進學術傳播及因應期刊訂購費用逐年攀升。同時可加速研究發展、提升研究影響力,NTU Scholars即為本校的開放取用典藏(OA Archive)平台。(點選深入了解OA)

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