Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
2020 | A 1.5£gJ/Task Path-Planning Processor for 2D/3D Autonomous Navigation of Micro Robots | Chung, C.; Yang, C.-H.; CHIA-HSIANG YANG | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | 5 | 0 | |
2020 | A 1.96 Gb/s Massive MU-MIMO Detector for Next-Generation Cellular Systems | Wen, C.-C.; Lee, Y.-C.; Wu, Y.-C.; Kao, C.-C.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Symposium on VLSI Circuits, Digest of Technical Papers | 4 | 0 | |
2019 | A 12.6 mW, 573-2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological Signals | Wang, Y.-Z.; Wang, Y.-P.; Wu, Y.-C.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 5 | 5 | |
2017 | A 135-mW Fully Integrated Data Processor for Next-Generation Sequencing | Wu, Y.-C.; Chang, C.-H.; Hung, J.-H.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Transactions on Biomedical Circuits and Systems | 15 | 10 | |
2020 | A 2.17-mw acoustic dsp processor with cnn-fft accelerators for intelligent hearing assistive devices | Lee, Y.-C.; Chi, T.-S.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 7 | 5 | |
2019 | A 2.17mW Acoustic DSP Processor with CNN-FFT Accelerators for Intelligent Hearing Aided Devices | Lee, Y.-C.; Chi, T.-S.; Yang, C.-H.; CHIA-HSIANG YANG | Proceedings 2019 IEEE International Conference on Artificial Intelligence Circuits and Systems, AICAS 2019 | 6 | 0 | |
2018 | A 2กั2-16กั16 Reconfigurable GGMD Processor for MIMO Communication Systems | Chiang, C.-H.; Huang, S.-A.; Chen, C.-E.; Yang, C.-H.; CHIA-HSIANG YANG | Proceedings - IEEE International Symposium on Circuits and Systems | 1 | 0 | |
2017 | A 5.28-Gb/s LDPC Decoder With Time-Domain Signal Processing for IEEE 802.15.3c Applications | Li, M.-R.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 14 | 13 | |
2005 | A 1.2V 6.7mW impulse-radio UWB baseband transceiver | Yang, C.-H.; Chen, K.-H.; Chiueh, T.-D.; CHIA-HSIANG YANG | IEEE International Solid-State Circuits Conference | | | |
2013 | A 10-Bit 200 MS/s capacitor-sharing pipeline ADC | Tseng, C.-J.; Hsieh, Y.-C.; Yang, C.-H.; Chen, H.-S.; HSIN-SHU CHEN | IEEE Transactions on Circuits and Systems I: Regular Papers | 9 | 7 | |
2013 | A 191μW BPSK demodulator for data and power telemetry in biomedical implants | Wang, L.-L.; Yang, C.-H.; Chiueh, H.; CHIA-HSIANG YANG | ACM Great Lakes Symposium on VLSI, GLSVLSI | 3 | 0 | |
2009 | A 2.89mW 50GOPS 16 × 16 16-core MIMO sphere decoder in 90nm CMOS | Yang, C.-H.; Markovic, D.; CHIA-HSIANG YANG | ESSCIRC 2009 - 35th European Solid-State Circuits Conference | 14 | 0 | |
2013 | A 28.6μW mixed-signal processor for epileptic seizure detection | Chen, T.-J.; Lee, S.-C.; Yang, C.-H.; Chiu, C.-F.; Chiueh, H.; CHIA-HSIANG YANG | IEEE Symposium on VLSI Circuits | | | |
2014 | A 5.4 μw soft-decision bch decoder for wireless body area networks | Yang, C.-H.; Huang, T.-Y.; Li, M.-R.; Ueng, Y.-L.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 19 | 18 | |
2010 | A 5.8mW 3GPP-LTE compliant 8×8 MIMO sphere decoder chip with soft-outputs | Yang, C.-H.; Yu, T.-H.; Markovi?, D.; CHIA-HSIANG YANG | IEEE Symposium on VLSI Circuits | 14 | 0 | |
2012 | A 7.4-mW 200-MS/s wideband spectrum sensing digital baseband processor for cognitive radios | Yu, T.-H.; Yang, C.-H.; ?abri?, D.; Markovi?, D.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 25 | 20 | |
2011 | A 7.4mW 200MS/s wideband spectrum sensing digital baseband processor for cognitive radios | Yu, T.-H.; Yang, C.-H.; ?abri?, D.; Markovi?, D.; CHIA-HSIANG YANG | IEEE Symposium on VLSI Circuits | | | |
2011 | A 75μW, 16-channel neural spike-sorting processor with unsupervised clustering | Karkare, V.; Gibson, S.; Yang, C.-H.; Chen, H.; Markovi?, D.; CHIA-HSIANG YANG | IEEE Symposium on VLSI Circuits | | | |
2015 | A 794Mbps 135mW iterative detection and decoding receiver for 4x4 LDPC-coded MIMO systems in 40nm | Wu, W.-H.; Sun, W.-C.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG | IEEE Symposium on VLSI Circuits | 3 | 0 | |
2016 | A 98.6μW acoustic signal processor for fully-implantable cochlear implants | Liu, H.-M.; Lin, Y.-J.; Lee, Y.-C.; Lee, C.-Y.; Yang, C.-H.; CHIA-HSIANG YANG | 2016 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2016 | 5 | 0 | |