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Results 1-20 of 73 (Search time: 0.01 seconds).

Issue DateTitleAuthor(s)SourcescopusWOSFulltext/Archive link
1200810Gbps inductorless CDRs with digital frequency calibrationChe-Fu Liang; Hong-Lin Chu; Shen-Iuan Liu; SHEN-IUAN LIU IEEE Transactions on Circuits and Systems I: Regular Papers 1211
22007124 MSamples/s Pixel-Pipelined Motion-JPEG 2000 Codec Without Tile MemoryChang, Yu-Wei; Cheng, Chih-Chi; Chen, Chun-Chia; Fang, Hung-Chi; Chen, Liang-GeeIEEE Transactions on Circuits and Systems for 
32009A 60-GHz phased array receiver front-end in 0.13-?m CMOS technologyWang, Chao-Shiun; Huang, Juin-Wei; Chu, Kun-Da; Wang, Chorng-KuangIEEE Transactions on Circuits and Systems I: Regular Papers 
42016A 0.45-V Low-Power OOK/FSK RF Receiver in 0.18 μ CMOS Technology for Implantable Medical ApplicationsSHEY-SHI LU IEEE Transactions on Circuits and Systems I: Regular Papers 2725
52013A 10-Bit 200 MS/s capacitor-sharing pipeline ADCTseng, C.-J.; Hsieh, Y.-C.; Yang, C.-H.; Chen, H.-S.; HSIN-SHU CHEN IEEE Transactions on Circuits and Systems I: Regular Papers 97
62006A 200-Mbps∼2-Gbps continuous-rate clock-and-data-recovery circuitRong-Jyi Yang; Kuan-Hua Chao; Shen-Iuan Liu; SHEN-IUAN LIU IEEE Transactions on Circuits and Systems I: Regular Papers 2619
72009A 5-GHz-Band CMOS receiver with low LO self-mixing front endChen, H.-C.; Wang, T.; Chiu, H.-W.; Yang, Y.-C.; Kao, T.-H.; Huang, G.-W.; Lu, S.-S.; SHEY-SHI LU IEEE Transactions on Circuits and Systems I: Regular Papers 1512
82014A 5.4 μw soft-decision bch decoder for wireless body area networksYang, C.-H.; Huang, T.-Y.; Li, M.-R.; Ueng, Y.-L.; CHIA-HSIANG YANG IEEE Transactions on Circuits and Systems I: Regular Papers 1817
92014A 6-Bit 1 GS/s pipeline ADC using incomplete settling with background sampling-point calibrationTseng, C.-J.; Lai, C.-F.; Chen, H.-S.; HSIN-SHU CHEN IEEE Transactions on Circuits and Systems I: Regular Papers 1310
102013A 77-GHz CMOS automotive radar transceiver with anti-interference functionLuo, T.-N.; Wu, C.-H.E.; Chen, Y.-J.E.; YI-JAN EMERY CHEN IEEE Transactions on Circuits and Systems I: Regular Papers 7772
112009A flexible DSP architecture for MIMO sphere decodingYang, C.-H.; Markovi?, D.; CHIA-HSIANG YANG IEEE Transactions on Circuits and Systems I: Regular Papers 3628
122014A fully parallel ldpc decoder architecture using probabilistic min-sum algorithm for high-throughput applicationsCheng, C.-C.; Yang, J.-D.; Lee, H.-C.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG IEEE Transactions on Circuits and Systems I: Regular Papers 3733
132012A high-efficiency CMOS dc-dc converter with 9-μs transient recovery timeLiu, P.-J.; Ye, W.-S.; Tai, J.-N.; Chen, H.-S.; Chen, J.-H.; Chen, Y.-J.E.; YI-JAN EMERY CHEN ; HSIN-SHU CHEN ; Chen, Jau-Horng IEEE Transactions on Circuits and Systems I: Regular Papers 3332
142015A loop gain optimization technique for integer-N TDC-based phase-locked loopsTing-Kuei Kuan; Shen-Iuan Liu; SHEN-IUAN LIU IEEE Transactions on Circuits and Systems I: Regular Papers 2222
152010A New Criterion for the Design of Variable Fractional-Delay FIR Digital FiltersS. C. Pei; Cheng-Han Chan; Yun-Da Huang; Shih-Hsin Lin; SOO-CHANG PEI IEEE Transactions on Circuits and Systems I: Regular Papers 2519
162011A polar-transmitter architecture using multiphase pulsewidth modulationChen, J.-H.; Yang, H.-S.; Lin, H.-C.; Chen, Y.-J.E.; Chen, Jau-Horng ; YI-JAN EMERY CHEN IEEE Transactions on Circuits and Systems I: Regular Papers 4343
172011A rail-to-rail class-B buffer with DC level-shifting current mirror and distributed Miller compensation for LCD column driversWei-Jen Huang; Shigeisa Nagayasu; Shen-Iuan Liu; SHEN-IUAN LIU IEEE Transactions on Circuits and Systems I: Regular Papers 1817
182006A spur-reduction technique for a 5-GHz frequency synthesizerChun-Yi Kuo; Jung-Yu Chang; Shen-Iuan Liu; SHEN-IUAN LIU IEEE Transactions on Circuits and Systems I: Regular Papers 4936
192016A Standard-Cell-Design-Flow Compatible Energy-Recycling Logic With 70% Energy SavingLee, C.-Y.; Hsieh, P.-H.; Yang, C.-H.; CHIA-HSIANG YANG IEEE Transactions on Circuits and Systems I: Regular Papers 55
202015A Systolic Array Based GTD Processor With a Parallel AlgorithmYang, C.-H.; Chou, C.-W.; Hsu, C.-S.; Chen, C.-E.; CHIA-HSIANG YANG IEEE Transactions on Circuits and Systems I: Regular Papers 1615