摘要:在新的計畫中,為了追求高趨動電流的場效電晶體,有以下幾種方式 (1) 提高載子遷移率,如改善通道材料,使用鍺或三五族等高遷移率的材料,其中,鍺材料是極有可能被使用在14奈米p型鰭式場效電晶體當作通道材料,其優勢除了在井壁(sidewall)為(110)方向有最高的遷移率之外,還可以和現有的矽製程相容。 (2) 改變元件結構,為了因應7-5 奈米技術節點,採用不同於傳統電晶體結構,改為鰭式場效電晶體。此計畫中,利用鍺/鍺錫合金材料作為研究的主題。鍺/鍺錫合金材料的直接能隙導電帶的等效質量遠小於非直接能隙的導電帶,可以有效的增加電子遷移率而應用於N型場效電晶體中,此外,該材料的價電帶的電洞遷移率也高於鍺材料,亦可應用於P型電晶體元件中。而矽的晶格常數為0.54 奈米、鍺的晶格常數為0.56 奈米、錫的晶格常數為0.65 奈米,所以鍺/鍺錫材料對矽基板晶格的不匹配量可以比矽鍺材料對矽基板的不匹配量大上很多,可以做為源極/汲極當作鍺/鍺錫通道的壓力源(stressor)更進一步使通道之遷移率增加,同時,鍺錫的能帶較鍺小上許多,所以使用鍺錫於源極/汲極時,金屬與鍺錫的位障可以降低,造成接觸電阻可以大幅降低。有鑑於此,本計畫主要分為三個部分 (1) 生長鍺/鍺錫合金材料與生長特性分析,因為錫在鍺晶體中溶解度極低(小於1%),且錫氣體先驅物為一極不穩定化學物質,價格亦昂貴,因此,過去對於鍺/鍺錫材料的成長與特性分析研究仍有限。首先將利用超高真空化學氣相沉積(UHVCVD)系統成長鍺/鍺錫合金材料於矽基板上,對鍺/鍺錫合金材料成長行為做基礎的研究與觀察。不同方向之矽基板將對薄膜磊晶有很大的影響,因此使用不同方向基板,進行鍺/鍺錫材料磊晶成長,並作出材料特性分析,包括:穿透式電子顯微鏡、掃描二次電子顯微鏡、二次離子質譜儀、X 光繞射分析等。(2) 光學分析與物理機制,不同的錫濃度造成合金能隙上的差異,當錫濃度超過6% 時該材料為直接能隙,而好的材料將會有光激發光(PL),利用此技術確認不同錫濃度下的光頻譜變化,發光的頻譜可以由非直接能隙隨著錫濃度增加而轉變為直接能隙,而光激發光的強度代表材料缺陷的多寡,也代表合金材料在磊晶過程中可能的問題,光學的物理分析可作為製程改善重要的依據;此外,可製做金氧半穿隧二極體和PN發光二極體量測電激發光頻譜(EL)。不同的錫濃度造成不同的能隙,而發光頻譜主要為遠紅外光,該頻譜可以應用於生醫、醫療與光通訊中;而直接能隙的發光頻譜可望應用於發光二極體與雷射 (3) 高遷移率鍺錫電晶體實作,由先前的材料分析與光學性質探討,找出最合適的矽鍺錫材料應用於通道或是應力源中,同時結合高介電常數閘極氧化層來減低閘極漏電流以發展未來高速CMOS 元件技術。為了完成最佳化高介電常數閘極氧化層與鍺/鍺錫磊晶層之整合,高介電常數材料的選擇、成長溫度的控制和界面的處理等為主要研究課題。對於應力的材料分析,成長一層超薄純鍺/鍺錫層於矽基板上,利用鍺/鍺錫濃度漸增鬆弛緩衝層技術獲得受壓縮應變之完全受應變鍺/鍺錫層、離子佈植對應變鍺/鍺錫層的應變釋放與雜質濃度活化情況和區域選擇性的鍺/鍺錫成長研究,以便日後於源極/汲極區域為通道之壓力源的研究。可望應用於以鍺/鍺錫直接長在矽基板上之技術為主之應變鍺/鍺錫通道元件、以鍺/鍺錫直接成長在SOI上之技術為主之鍺錫通道元件以及鍺/鍺錫通道鰭狀結構電晶體。
Abstract: To pursue high current for the MOSFETs, there are several ways to achieve. (1) To use higher mobility materials than Si as channel materials of FinFETs, ex: Ge with lower effective mass as compare to Si, the electron and hole mobility is 4x and 2.7x at bulk condition, respectively. Using SiGe channel, new FinFETs sidewall directions such as (110) or (111), and silicon-on-insulator (SOI) are potential methods used to increase driving current. Ge is most likely to be used in the 14-nm node pFinFETs as a channel material not only the highest hole mobility of sidewall (110) but also the compatible with Si fabrications. (2) For 7-5 nm technology node, FinFET structures are common used for current industry. In this project, the Ge/GeSn material serves as the study topic for further research. Due to the smaller effective mass in the direct valley than in the indirect valley for GeSn material, the electron mobility is higher than Ge material, which can be used for n-MOSFET. Besides, the hole mobility of GeSn material is higher than Ge material, which can be used for p-MOSFET. The advantages and importance of GeSn materials have been revealed. Furthermore, the lattice constant of Si is 0.54 nm, Ge is 0.56 nm, and Sn is 0.65 nm. There are larger lattice mismatch between GeSn and Si than between SiGe and Si. Therefore, Ge/GeSn alloys also can be used as S/D stressors to boost carrier mobility. On the other hand, the band diagrams of GeSn is smaller than Ge, the potential barriers of metal/GeSn can be reduced to diminish contact resistances. There are three topics for this proposal. (1) The material growth and growth characteristic analysis of Ge/GeSn. Only limited studies of Ge/GeSn growth and material analysis have been reported, because of the low Sn solubility in the Ge matrix (less than 1%), the instability of the Sn precusor, and the high cost of the Sn precusor (SnD4). In this study, we will develop Ge/GeSn epitaxial growth directly on Si by ultra-high-vacuum chemical vapor deposition (UHVCVD), and study the Ge/GeSn growth mechanism. The one of impact factors of the SiGeSn growth is the orentation of the Si substrate. In this study, we will also study the effect of the orentation of the Si substrate on the Ge/GeSn growth mechanism. The material analyses of the Ge/GeSn epilayer will be completed through the transmission electron microscopy (TEM), the scanning electron microscopy (SEM), the atomic force microscope (AFM), the second ion mass spectroscopy (SIMS), and the X-ray diffraction (XRD). After the material analyses, we will establish a Ge/GeSn growth model and optimize the growth condition to finish a high quality Ge/GeSn epilayer. (2) The optical analysis and physical mechanism. Different Sn concentrations lead different energy bandgap and different PL spectra. When the Sn concentration is higher than 6%, the material becomes direct bandgap material. A good material has photoluminescence (PL), which implies the high quality and strong PL intensity. MOS light emitting diode (LED) and pn diode LED are two of important optoelectronic devices for electroluminescence (EL). The Ge/GeSn is a material for IR source, which can be applied in biomedical, medical and optical communication. However, the direct bandgap emission of Ge/GeSn material is also a good candidate for LED and laser applications. (3) High mobility Ge/GeSn MOSFET fabrication. One of the promising CMOS technologies for high performance is to integrate the high mobility GeSn channel with the low gate leakage high- dielectric gate stake layer. The thermal instability, the dissolubility, and the surface passivation, make it difficult to integrate the high- layer. Therefore, it is extremely important to have pre-treatment at the interface between the GeSn and the high- dielectric layer, and between the high- dielectric layer and gate metal. Moreover, for the stress analysis, it is important to grow GeSn on Si and SOI directly and fabricate the GeSn channel devices, grow tensile strained GeSn layer as channel on relaxed buffer layer, and apply external mechanical stress on GeSn-channels and analyze device characteristics.