第 1 到 48 筆結果,共 48 筆。
公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 | |
---|---|---|---|---|---|---|---|
1 | 2023 | Clinical utility of anal sphincter relaxation integral in water-perfused and solid-state high-resolution anorectal manometry | JIA-FENG WU ; Lin, Yu-Cheng; CHIA-HSIANG YANG ; PING-HUEI TSENG ; I-JUNG TSAI ; WEN-HSI LIN ; WEN-MING HSU | Journal of the Formosan Medical Association = Taiwan yi zhi | 1 | 0 | |
2 | 2023 | An Energy-Efficient Double Ratchet Cryptographic Processor With Backward Secrecy for IoT Devices | Yu, Sheng Jung; Lee, Yu Chi; Lin, Liang Hsin; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 0 | 0 | |
3 | 2023 | A 40-nm 91-mW, 90-fps Learning-Based Full HD Super-Resolution Accelerator | Shen, Hsueh Yen; Lee, Yu Chi; Tong, Tzu Wei; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 0 | 0 | |
4 | 2023 | A 96.2-nJ/class Neural Signal Processor with Adaptable Intelligence for Seizure Prediction | Hsieh, Yi Yen; Lin, Yu Cheng; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 1 | 1 | |
5 | 2023 | A 28.8-mW Accelerator IC for Dark Channel Prior-Based Blind Image Deblurring | Chen, Po Shao; Chen, Yen Lung; Lee, Yu Chi; Fu, Zih Sing; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | |||
6 | 2023 | An FM-index Based High-Throughput Memory-Efficient FPGA Accelerator for Paired-end Short-read Mapping | Yang, Chung Hsuan; Wu, Yi Chung; Chen, Yen Lung; Lee, Chao Hsi; Hung, Jui Hung; CHIA-HSIANG YANG | IEEE Transactions on Biomedical Circuits and Systems | 0 | 0 | |
7 | 2022 | Achieving Accurate Automatic Sleep Apnea/Hypopnea Syndrome Assessment Using Nasal Pressure Signal | Ying-Sheng Lin; Yi-Pao Wu; Yi-Chung Wu; PEI-LIN LEE ; CHIA-HSIANG YANG | IEEE Journal of Biomedical and Health Informatics | 2 | 2 | |
8 | 2022 | CAS Research and Teaching Activities in Taiwan [CAS in the World] | Chang, Robert Chen Hao; Hwang, Yin Tsung; Lin, Yuan Pei; CHIA-HSIANG YANG | IEEE Circuits and Systems Magazine | 0 | 0 | |
9 | 2021 | Bolus transit of upper esophageal sphincter on high-resolution impedance manometry study correlate with the laryngopharyngeal reflux symptoms | JIA-FENG WU ; WEI-CHUNG HSU ; I-JUNG TSAI ; Tong, TW; Lin, YC; CHIA-HSIANG YANG ; PING-HUEI TSENG | SCIENTIFIC REPORTS | 2 | 2 | |
10 | 2021 | A 975-mW Fully Integrated Genetic Variant Discovery System-on-Chip in 28 nm for Next-Generation Sequencing | Wu Y.-C; CHIA-HSIANG YANG et al. | IEEE Journal of Solid-State Circuits | 2 | 1 | |
11 | 2021 | Hybrid Precoding Baseband Processor for 64x 64 Millimeter Wave MIMO Systems | Kao C; Chen C; Yang C.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 3 | 3 | |
12 | 2021 | A High-Throughput FPGA Accelerator for Short-Read Mapping of the Whole Human Genome | Chen Y.-L; Chang B.-Y; CHIA-HSIANG YANG ; TZI-DAR CHIUEH | IEEE Transactions on Parallel and Distributed Systems | 8 | 15 | |
13 | 2021 | A 1.5-μJ/Task Path-Planning Processor for 2-D/3-D Autonomous Navigation of Microrobots | Chung C; Yang C.-H.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 3 | 2 | |
14 | 2021 | Design of a Bone-Guided Cochlear Implant Microsystem with Monopolar Biphasic Multiple Stimulations and Evoked Compound Action Potential Acquisition and Its in Vivo Verification | Liu C.-H; Wu, Chung-Yu; Ker, Ming-Dou; Liu, Chien-Hao ; Hung, Chung-Chih; Yang, Chia-Hsiang ; Lee, Chia-Fone; Chang, Po-Chih; Tu, Yen-Fu; Tang, Li-Yang; Chen, Ching-Yuan; CHIEN-HAO LIU | IEEE Journal of Solid-State Circuits | 12 | 8 | |
15 | 2020 | Pressure-impedance analysis: Assist the diagnosis and classification of ineffective esophageal motility disorder | JIA-FENG WU ; I-JUNG TSAI ; Tong, TW; YI-CHENG LIN ; CHIA-HSIANG YANG ; PING-HUEI TSENG | JOURNAL OF GASTROENTEROLOGY AND HEPATOLOGY | 4 | 3 | |
16 | 2020 | A 1.5 mW Programmable Acoustic Signal Processor for Hearing Assistive Devices with Speech Intelligibility Enhancement | Lin Y.-J; Lee Y.-C; Liu H.-M; Chiueh H; Chi T.-S; Yang C.-H.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 3 | 3 | |
17 | 2020 | A 1.9-mW SVM Processor with On-Chip Active Learning for Epileptic Seizure Control | Huang, S.-A.; Chang, K.-C.; HORNG-HUEI LIOU ; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 32 | 23 | |
18 | 2020 | Digital Logic and Asynchronous Datapath with Heterogeneous TFET-MOSFET Structure for Ultralow-Energy Electronics | Hung, J.; Wang, P.; Lo, Y.; Yang, C.; Tsui, B.; Yang, C.; CHIA-HSIANG YANG | IEEE Journal on Exploratory Solid-State Computational Devices and Circuits | 4 | 4 | |
19 | 2020 | A 2.17-mw acoustic dsp processor with cnn-fft accelerators for intelligent hearing assistive devices | Lee, Y.-C.; Chi, T.-S.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 8 | 6 | |
20 | 2019 | A Hardware-Efficient ADMM-Based SVM Training Algorithm for Edge Computing. | Huang, Shuo-An; Yang, Chia-Hsiang; CHIA-HSIANG YANG | CoRR | |||
21 | 2019 | Iterative Inter-Cell Interference Cancellation Receiver for LDPC-Coded MIMO Systems | Sun, W.-C.; Chen, Y.-T.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG | IEEE Transactions on Signal Processing | 1 | 1 | |
22 | 2019 | An LDPC-Coded SCMA receiver with multi-user iterative detection and decoding | Sun, W.-C.; Su, Y.-C.; Ueng, Y.-L.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 18 | 18 | |
23 | 2019 | A 12.6 mW, 573-2901 kS/s Reconfigurable Processor for Reconstruction of Compressively Sensed Physiological Signals | Wang, Y.-Z.; Wang, Y.-P.; Wu, Y.-C.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 5 | 5 | |
24 | 2019 | An integrated message-passing detector and decoder for polar-coded massive MU-MIMO systems | Chen, Y.-T.; Sun, W.-C.; Cheng, C.-C.; Tsai, T.-L.; Ueng, Y.-L.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 22 | 19 | |
25 | 2018 | A 1-V 2.6-mW Environmental Compensated Fully Integrated Nose-on-a-Chip | T.-I Chou; K.-H. Chang; J.-Y. Jhang; S.-W. Chiu; G. Wang; CHIA-HSIANG YANG ; H. Chiueh; H. Chen; C.-C. Hsieh; M.-F. Chang; K.-T. Tang | IEEE Transactions on Circuits and Systems II | 5 | 4 | |
26 | 2018 | A Hardware-Scalable DSP Architecture for Beam Selection in mm-Wave MU-MIMO Systems | C.-Y. Yeh; T.-C. Chu; C.-E. Chen; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Paper | 3 | 3 | |
27 | 2018 | Diagnostic Role of Anal Sphincter Relaxation Integral in High-Resolution Anorectal Manometry for Hirschsprung Disease in Infants | JIA-FENG WU ; CHENG-HSUN LU ; CHIA-HSIANG YANG ; I-JUNG TSAI | Journal of Pediatrics | 22 | 10 | |
28 | 2018 | Distal contractile to impedance integral ratio assist the diagnosis of pediatric ineffective esophageal motility disorder | JIA-FENG WU ; Chung, Chieh; PING-HUEI TSENG ; I-JUNG TSAI ; Lin, Yi-Cheng; CHIA-HSIANG YANG ; YI-CHENG LIN | Pediatric Research | 4 | 4 | |
29 | 2017 | A 5.28-Gb/s LDPC Decoder With Time-Domain Signal Processing for IEEE 802.15.3c Applications | Li, M.-R.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 14 | 14 | |
30 | 2017 | A 135-mW Fully Integrated Data Processor for Next-Generation Sequencing | Wu, Y.-C.; Chang, C.-H.; Hung, J.-H.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Transactions on Biomedical Circuits and Systems | 16 | 12 | |
31 | 2017 | A Flexible Geometric Mean Decomposition Processor for MIMO Communication Systems | Y.-C. Tsai; C.-E. Chen; C.-H. Yang; CHIA-HSIANG YANG | IEEE Transaction on Circuits & Systems I (TCAS-I) | 5 | 5 | |
32 | 2017 | A 5.28-Gbps LDPC Decoder with Time-domain Signal Processing for IEEE 802.15.3c Applications | M.-R. Li; C.-H. Yang; Y.-L. Ueng; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | |||
33 | 2016 | A Standard-Cell-Design-Flow Compatible Energy-Recycling Logic With 70% Energy Saving | Lee, C.-Y.; Hsieh, P.-H.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 5 | 5 | |
34 | 2016 | sBWT: Memory Efficient Implementation of the Hardware-acceleration-friendly Schindler Transform for the Fast Biological Sequence Mapping | C.-H. Chang; M.-T. Chou; Y.-C. Wu; T.-W. Hong; Y.-L. Li; C.-H. Yang; J.-H. Hung; CHIA-HSIANG YANG | Bioinformatics | 8 | 7 | |
35 | 2015 | A Fully Integrated Nose-on-a-Chip for Rapid Diagnosis of Ventilator-Associated Pneumonia | Chiu, S.; CHIA-HSIANG YANG et al. | IEEE Transactions on Biomedical Circuits and Systems | 22 | 15 | |
36 | 2015 | An iterative detection and decoding receiver for LDPC-coded MIMO systems | Sun, W.-C.; Wu, W.-H.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 28 | 25 | |
37 | 2015 | An iterative geometric mean decomposition algorithm for MIMO communications systems | Chen, C.-E.; Tsai, Y.-C.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Transactions on Wireless Communications | 19 | 14 | |
38 | 2015 | A Systolic Array Based GTD Processor With a Parallel Algorithm | Yang, C.-H.; Chou, C.-W.; Hsu, C.-S.; Chen, C.-E.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 18 | 17 | |
39 | 2014 | A 5.4 μw soft-decision bch decoder for wireless body area networks | Yang, C.-H.; Huang, T.-Y.; Li, M.-R.; Ueng, Y.-L.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 19 | 18 | |
40 | 2014 | An 81.6 μW FastICA Processor for Epileptic Seizure Detection | Yang, C.-H.; Shih, Y.-H.; Chiueh, H.; CHIA-HSIANG YANG | IEEE Transactions on Biomedical Circuits and Systems | 31 | 27 | |
41 | 2014 | A fully integrated 8-channel closed-loop neural-prosthetic cmos soc for real-time epileptic seizure control | CHIA-HSIANG YANG et al. | IEEE Journal of Solid-State Circuits | 183 | 162 | |
42 | 2014 | A fully parallel ldpc decoder architecture using probabilistic min-sum algorithm for high-throughput applications | Cheng, C.-C.; Yang, J.-D.; Lee, H.-C.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 39 | 35 | |
43 | 2013 | A hierarchical approach for online temporal lobe seizure detection in long-term intracranial EEG recordings | Liang, S.-F.; Chen, Y.-C.; Wang, Y.-L.; Chen, P.-T.; Yang, C.-H.; Chiueh, H.; CHIA-HSIANG YANG | Journal of Neural Engineering | 34 | 25 | |
44 | 2012 | A 7.4-mW 200-MS/s wideband spectrum sensing digital baseband processor for cognitive radios | Yu, T.-H.; Yang, C.-H.; ?abri?, D.; Markovi?, D.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 25 | 20 | |
45 | 2012 | Power and area minimization of reconfigurable FFT processors: A 3GPP-LTE example | Yang, C.-H.; Yu, T.-H.; Markovi?, D.; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 114 | 85 | |
46 | 2010 | AMiBA wideband analog correlator | Li, C.-T.; TZI-DAR CHIUEH ; JIUN-HUEI PROTY WU ; CHIA-HSIANG YANG et al. | Astrophysical Journal | 16 | 17 | |
47 | 2009 | The yuan-tseh lee array for microwave background anisotropy | Ho, P.T.P.; Altamirano, P.; Chang, C.-H.; Chang, S.-H.; Chang, S.-W.; Chen, C.-C.; Chen, K.-J.; Chen, M.-T.; Han, C.-C.; Ho, W.M.; Huang, Y.-D.; Hwang, Y.-J.; Ib?ez-Romano, F.; Jiang, H.; Koch, P.M.; Kubo, D.Y.; Li, C.-T.; Lim, J.; Lin, K.-Y.; Liu, G.-C.; Lo, K.-Y.; Ma, C.-J.; Martin, R.N.; Martin-Cocher, P.; Molnar, S.M.; Ng, K.-W.; Nishioka, H.; O'Connell, K.E.; Oshiro, P.; Patt, F.; Raffin, P.; Umetsu, K.; Wei, T.; Wu, J.-H.P.; Chiueh, T.-D.; Chiueh, T.; Chu, T.-H.; Huang, C.-W.L.; Hwang, W.Y.P.; Liao, Y.-W.; Lien, C.-H.; Wang, F.-C.; Wang, H.; Wei, R.-M.; Yang, C.-H.; Kesteven, M.; Kingsley, J.; Sinclair, M.M.; Wilson, W.; Birkinshaw, M.; Liang, H.; Lancaster, K.; Park, C.-G.; Pen, U.-L.; TZI-HONG CHIUEH ; W-Y HWANG ; CHIA-HSIANG YANG ; Chang, Chia-Hao; TAH HSIUNG CHU ; FU-CHENG WANG ; HUEI WANG ; TZI-DAR CHIUEH ; JIUN-HUEI PROTY WU | Astrophysical Journal | 38 | 40 | |
48 | 2009 | A flexible DSP architecture for MIMO sphere decoding | Yang, C.-H.; Markovi?, D.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 37 | 28 |