Results 1-487 of 487 (Search time: 0.007 seconds).

Issue DateTitleAuthor(s)SourcescopusWOSFulltext/Archive link
12021Mixed-Cell-Height Placement with Drain-to-Drain Abutment and Region ConstraintsChen J; Zhu Z; Guo L; Tseng Y; Chang Y.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems0
22021Opportunities for 2.5/3D Heterogeneous SoC IntegrationJiang I.H.-R; Chang Y.-W; Huang J.-L; Chen C.-P.; YAO-WEN CHANG 2021 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2021 - Proceedings0
32021A DAG-Based Algorithm for Obstacle-Aware Topology-Matching On-Track Bus RoutingHsu C.-H; Hung S.-C; Chen H; Sun F.-K; Chang Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems0
42021Analytical Placement Considering the Electron-Beam Fogging EffectChen J; Chang Y.-W; Huang Y.-C.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems0
52020高功率直驅式半導體雷射之發展宋育誠; 蘇信嘉; 張耀文; 林士廷; YAO-WEN CHANG 機械工業雜誌
62020Time-division multiplexing based system-level FPGA routing for logic verificationZou, P.; Lin, Z.; Shi, X.; Wu, Y.; Chen, J.; Yu, J.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - Design Automation Conference0
72020Hamiltonian path based mixed-cell-height legalization for neighbor diffusion effect mitigationChen, J.; Zhu, Z.; Liu, Q.; Zhang, Y.; Zhu, W.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - Design Automation Conference0
82020An efficient EPIST algorithm for global placement with non-integer multiple-height cellsChen, J.; Huang, Z.; Huang, Y.; Zhu, W.; Yu, J.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - Design Automation Conference0
92020Topological structure and physical layout codesign for wavelength-routed optical networks-on-chipLu, Y.-S.; Yu, S.-J.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - Design Automation Conference0
102020Via-based redistribution layer routing for InFO packages with irregular pad structuresWen, H.-T.; Cai, Y.-J.; Hsu, Y.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - Design Automation Conference0
112020Unified Redistribution Layer Routing for 2.5D IC PackagesChiang, C.-H.; Chuang, F.-Y.; Chang, Y.-W.; YAO-WEN CHANG Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC0
122020Latch clustering for timing-power co-optimizationHuang, C.-C.; Tellez, G.; Nam, G.-J.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - Design Automation Conference0
132020A provably good wavelength-division-multiplexing-aware clustering algorithm for on-chip optical routingLu, Y.-S.; Yu, S.-J.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - Design Automation Conference0
142020Mixed-Cell-Height Legalization Considering Technology and Region ConstraintsZhu Z; Chen J; Zhu W; Chang Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems2
152020Intelligent Design Automation for 2.5/3D Heterogeneous SoC IntegrationJiang I.H.-R; Chang Y.-W; Huang J.-L; Chen C.-P.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD0
162020Clock-Aware Placement for Large-Scale Heterogeneous FPGAsChen J; Lin Z; Kuo Y.-C; Huang C.-C; Chang Y.-W; Chen S.-C; Chiang C.-H; Kuo S.-Y.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems0
172020Routability-Aware Pin Access Optimization for Monolithic 3D Designs*Wang R.-Y; Chang Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD0
182019BiG: A bivariate gradient-based wirelength model for analytical circuit placementSunl, F.-K.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - Design Automation Conference00
192019A DAG-based algorithm for obstacle-aware topology-matching on-track bus routingHsu, C.-H.; Hungz, S.-C.; Chenz, H.; Sunz, F.-K.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - Design Automation Conference00
202019Multiview Contouring for Breast Tumor on Magnetic Resonance Imaging.Chen, Dar-Ren; Chang, Yao-Wen; Wu, Hwa-Koon; Shia, Wei-Chung; Huang, Yu-Len; YAO-WEN CHANG J. Digital Imaging12
212019Many-body theory of optical absorption in doped two-dimensional semiconductorsChang, Y.-W.; Reichman, D.R.; YAO-WEN CHANG Physical Review B314
222019A DAG-Based Algorithm for Obstacle-Aware Topology-Matching On-Track Bus Routing.Hsu, Chen-Hao; Hung, Shao-Chun; Chen, Hao; Sun, Fan-Keng; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 201900
232019Analytical Mixed-cell-height legalization considering average and maximum movement minimizationLi, X.; Chen, J.; Zhu, W.; Chang, Y.-W.; YAO-WEN CHANG Proceedings of the International Symposium on Physical Design00
242019BiG: A Bivariate Gradient-Based Wirelength Model for Analytical Circuit Placement.Sun, Fan-Keng; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 56th Annual Design Automation Conference 2019, DAC 2019, Las Vegas, NV, USA, June 02-06, 201900
252019Editorial TVLSI Positioning - Continuing and Accelerating an Upward Trajectory.Alioto, Massimo; Abadir, Magdy S.; Arslan, Tughrul; Boon, Chirn Chye; Burg, Andreas; Chang, Chip-Hong; Chang, Meng-Fan; Chang, Yao-Wen; Chen, Poki; Corsonello, Pasquale; Crovetti, Paolo; Dosho, Shiro; Drechsler, Rolf; Elfadel, Ibrahim Abe M.; Han, Ruonan; Hashimoto, Masanori; Heng, Chun-Huat; Heo, Deukhyoun; Ho, Tsung-Yi; Homayoun, Houman; Hwang, Yuh-Shyan; Joshi, Ajay; Joshi, Rajiv V.; Karnik, Tanay; Kim, Chulwoo; Kim, Tae-Hyoung; Kulkarni, Jaydeep; Kursun, Volkan; Lee, Yoonmyung; Li, Hai Helen; Li, Huawei; Mishra, Prabhat; Mohammad, Baker; Kermani, Mehran Mozaffari; Nagata, Makoto; Nii, Koji; Pande, Partha Pratim; Paul, Bipul C.; Pavlidis, Vasilis F.; Gyvez, Jos? Pineda de; Savidis, Ioannis; Schaumont, Patrick; Sebastiano, Fabio; Sengupta, Anirban; Seok, Mingoo; Stan, Mircea R.; Tehranipoor, Mark M.; Todri-Sanial, Aida; Verhelst, Marian; Vignoli, Valerio; Wen, Xiaoqing; Xu, Jiang; Zhang, Wei; Zhang, Zhengya; Zhou, Jun; Zwolinski, Mark; Weber, Stacey; YAO-WEN CHANG IEEE Trans. VLSI Syst.24
262019MDP-trees: Multi-domain macro placement for ultra large-scale mixed-size designsLiu, Y.-C.; Chen, T.-C.; Chang, Y.-W. ; Kuo, S.-Y.Asia and South Pacific Design Automation Conference, ASP-DAC 00
272019DSA-Compliant Routing for 2-D Patterns Using Block Copolymer LithographySu, Y.-H.; Chang, Y.-W. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 00
282019Obstacle-aware group-based length-matching routing for pre-assignment area-I/O flip-chip designsChang, Y.-H.; Wen, H.-T.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD0
292019Graph-and ILP-based cut redistribution for two-dimensional directed self-assemblyWang, Z.-L.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD0
302019Timing-aware fill insertions with design-rule and density constraintsLan T; Li X; Chen J; Yu J; He L; Dong S; Zhu W; Chang Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD0
312019Analytical placement with 3D poisson's equation and ADMM based optimization for large-scale 2.5D heterogeneous FPGAsChen J; Zhu W; Yu J; He L; Chang Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD0
322018Generalized augmented lagrangian and its applications to VLSI global placementZhu, Z.; Chen, J.; Peng, Z.; Zhu, W.; Chang, Y.-W. Design Automation Conference20
332018WB-trees: A meshed tree representation for FinFET analog layout designsLu, Y.-S.; Chang, Y.-H.; Chang, Y.-W. Design Automation Conference 00
342018Efficient multi-layer obstacle-avoiding region-to-region rectilinear steiner tree constructionWang, R.-Y.; Pai, C.-C.; Wang, J.-J.; Wen, H.-T.; Pai, Y.-C.; Chang, Y.-W. ; Li, J.C.M.; Jiang, J.-H.R.Design Automation Conference30
352018DSA-Friendly detailed routing considering double patterning and DSA template assignmentsYu, H.-J.; Chang, Y.-W. Design Automation Conference10
362018NTU place4dr: A Detailed-Routing-Driven Placer for Mixed-Size Circuit Designs with Technology and Region ConstraintsHuang, C.-C.; Lee, H.-Y.; Lin, B.-Q.; Yang, S.-W.; Chang, C.-H.; Chen, S.-T.; Chang, Y.-W. ; Chen, T.-C.; Bustany, I.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 411
372018Simultaneous partitioning and signals grouping for time-division multiplexing in 2.5D FPGA-based systemsChen, S.-C.; Sun, R.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD40
382018Novel proximal group ADMM for placement considering fogging and proximity effectsChen, J.; Yang, L.; Peng, Z.; Zhu, W.; Chang, Y.-W. IEEE/ACM International Conference on Computer-Aided Design00
392018Polarized excitons and optical activity in single-wall carbon nanotubesChang, Y.-W. ; Jin, B.-Y.Physical Review B 00
402018Analytical solution of Poisson's equation and its application to VLSI global placementZhu, W.; Huang, Z.; Chen, J.; Chang, Y.-W. IEEE/ACM International Conference on Computer-Aided Design20
412018DSA-Friendly detailed routing considering double patterning and DSA template assignmentsYu, H.-J.; Chang, Y.-W. Design Automation Conference10
422018Mixed-cell-height placement considering drain-to-drain abutmentTseng, Y.-W.; Chang, Y.-W. IEEE/ACM International Conference on Computer-Aided Design10
432018Mixed-cell-height placement with complex minimum-implant-area constraintsChen, J.; Yang, P.; Li, X.; Zhu, W.; Chang, Y.-W. IEEE/ACM International Conference on Computer-Aided Design10
442018A multithreaded initial detailed routing algorithm considering global routing guidesSun, F.-K.; Chen, H.; Chen, C.-Y.; Hsu, C.-H.; Chang, Y.-W. IEEE/ACM International Conference on Computer-Aided Design60
452018Mixed-cell-height legalization considering technology and region constraintsZhu, Z.; Li, X.; Chen, Y.; Chen, J.; Zhu, W.; Chang, Y.-W. IEEE/ACM International Conference on Computer-Aided Design20
462018beta-Nitrostyrene derivatives attenuate LPS-mediated acute lung injury via the inhibition of neutrophil-platelet interactions and NET releaseChang, Yao-Wen; Tseng, Ching-Ping; Lee, Chih-Hsun; Hwang, Tsong-Long; Chen, Yu-Li; Su, Mei-Tzu; Chong, Kowit-Yu; Lan, Ying-Wei; Wu, Chin-Chung; Chen, Kung-Ju; Lu, Fen-Hua; Liao, Hsiang-Ruei; Hsueh, Chuen; Hsieh, Pei-Wen; YAO-WEN CHANG American Journal of Physiology-Lung Cellular and Molecular Physiology55
472017FPGA placement and routingChen, S.-C.; Chang, Y.-W. IEEE/ACM International Conference on Computer-Aided Design30
482017Nanowire-Aware Routing Considering High Cut Mask ComplexitySu, Y.-H.; Chang, Y.-W. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 10
492017Redistribution layer routing for wafer-level integrated fan-out package-on-packagesLin, T.-C.; Chi, C.-C.; Chang, Y.-W. IEEE/ACM International Conference on Computer-Aided Design10
502017A novel damped-wave framework for macro placementChang, C.-H.; Chang, Y.-W. ; Chen, T.-C.IEEE/ACM International Conference on Computer-Aided Design30
512017Fogging Effect Aware Placement in Electron Beam LithographyHuang, Y.-C.; Chang, Y.-W. Design Automation Conference40
522017Graph-Based Logic Bit Slicing for Datapath-Aware PlacementHuang, C.-C.; Lin, B.-Q.; Lee, H.-Y.; Chang, Y.-W. ; Wu, K.-S.; Yang, J.-Z.Design Automation Conference10
532017Generalized force directed relaxation with optimal regions and its applications to circuit placementChang, Y.-W. International Symposium on Physical Design 00
542017Detailed Placement for Two-Dimensional Directed Self-Assembly TechnologyLin, Z.-W.; Chang, Y.-W. Design Automation Conference10
552017Cut Redistribution with Directed-Self-Assembly Templates for Advanced 1-D Gridded LayoutsLin, Z.-W.; Chang, Y.-W. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 00
562017Toward Optimal Legalization for Mixed-Cell-Height Circuit DesignsChen, J.; Zhu, Z.; Zhu, W.; Chang, Y.-W. Design Automation Conference 150
572017Blockage-aware terminal propagation for placement wirelength minimizationYang, S.-W.; Chang, Y.-W. ; Chen, T.-C.IEEE/ACM International Conference on Computer-Aided Design00
582017Mixed-cell-height detailed placement considering complex minimum-implant-area constraintsWu, Y.-Y.; Chang, Y.-W. IEEE/ACM International Conference on Computer-Aided Design90
592017An integrated-spreading-based macro-refining algorithm for large-scale mixed-size circuit designsChen, S.-T.; Chang, Y.-W. ; Chen, T.-C.IEEE/ACM International Conference on Computer-Aided Design10
602017Clock-aware placement for large-scale heterogeneous FPGAsKuo, Y.-C.; Huang, C.-C.; Chen, S.-C.; Chiang, C.-H.; Chang, Y.-W. ; Kuo, S.-Y.IEEE/ACM International Conference on Computer-Aided Design50
612017Provably good max-min-m-neighbor-TSP-based subfield scheduling for electron-beam photomask fabricationLin, Z.; Fang, S.; Chang, Y.-W. ; Rao, W.; Kuan, C.IEEE Transactions on Very Large Scale Integration (VLSI) Systems 02
622017An Interview With Professor Chenming Hu, Father of 3D TransistorsChang, Yao-Wen; Hu, Chenming; YAO-WEN CHANG Ieee Design & Test00
632017Editorial.Chakrabarty, Krishnendu; Alioto, Massimo; Baas, Bevan M.; Boon, Chirn Chye; Chang, Meng-Fan; Chang, Naehyuck; Chang, Yao-Wen; Chang, Chip-Hong; Chang, Shih-Chieh; Chen, Poki; Chowdhury, Masud H.; Corsonello, Pasquale; Elfadel, Ibrahim Abe M.; Hamdioui, Said; Hashimoto, Masanori; Ho, Tsung-Yi; Homayoun, Houman; Hwang, Yuh-Shyan; Joshi, Rajiv V.; Karnik, Tanay; Kermani, Mehran Mozaffari; Kim, Chulwoo; Kim, Tae-Hyoung; Kulkarni, Jaydeep P.; Kursun, Eren; Larsson, Erik; Li, Hai (Helen); Li, Huawei; Mercier, Patrick P.; Mishra, Prabhat; Nagata, Makoto; Natarajan, Arun S.; Nii, Koji; Pande, Partha Pratim; Savidis, Ioannis; Seok, Mingoo; Tan, Sheldon X.-D.; Tehranipoor, Mark Mohammad; Todri-Sanial, Aida; Velev, Miroslav N.; Wen, Xiaoqing; Xu, Jiang; Zhang, Wei; Zhang, Zhengya; Jackson, Stacey Weber; YAO-WEN CHANG IEEE Trans. VLSI Syst.00
642017Effect of heterogeneous wettable structures on pool boiling performance of cylindrical copper surfacesKumar, Sujith C. S.; Chang, Yao Wen; Chen, Ping-Hei; YAO-WEN CHANG Applied Thermal Engineering3639
652017Theory of charge transport in molecular junctions: Role of electron correlationChang, Y.-W.; Jin, B.-Y.; YAO-WEN CHANG Journal of Chemical Physics22
662017An effective legalization algorithm for mixed-cell-height standard cellsWang, C.-H.; Wu, Y.-Y.; Chen, J.; Chang, Y.-W.; Kuo, S.-Y.; Zhu, W.; Fan, G.; YAO-WEN CHANG Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC200
672017Pool-Boiling Heat-Transfer Enhancement on Cylindrical Surfaces with Hybrid Wettable PatternsKumar, Sujith C. S.; Chang, Yao Wen; Chen, Ping-Hei; YAO-WEN CHANG Jove-Journal of Visualized Experiments67
682016Timing-Driven Cell Placement Optimization for Early Slack Histogram CompressionC. C. Huang; Y. C. Liu; Y. S. Lu; Y. C. Kuo; Y. W. Chang; S. Y. Kuo; SY-YEN KUO ; YAO-WEN CHANG 53th ACM/IEEE Design Automation Conference (DAC-2016) 60
692016QB-trees: Towards an optimal topological representation and its applications to analog layout designsWu, I.-P.; Ou, H.-C.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference10
702016DSA-compliant routing for two-dimensional patterns using block copolymer lithographySu, Y.-H.; Chang, Y.-W. IEEE/ACM International Conference on Computer-Aided Design30
712016Provably good max-min-m-neighbor-TSP-based subfield scheduling for electron-beam photomask fabricationLin, Z.-W.; Fang, S.-Y.; Chang, Y.-W. ; Rao, W.-C.; Kuan, C.-H.2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015 00
722016Cut redistribution with directed self-assembly templates for advanced 1-D gridded layoutsLin, Z.-W.; Chang, Y.-W. Asia and South Pacific Design Automation Conference, ASP-DAC 160
732016Layout-Dependent Effects-Aware Analytical Analog PlacementOu, H.-C.; Tseng, K.-H.; Liu, J.-Y.; Wu, I.-P.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1425
742016Double-patterning aware DSA template guided cut redistribution for advanced 1-D gridded designsLin, Z.-W.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 180
752016Minimum-implant-area-aware detailed placement with spacing constraintsTseng, K.-H.; Chang, Y.-W.; Liu, C.C.C.; YAO-WEN CHANG Design Automation Conference90
762016Detailed-routability-driven analytical placement for mixed-size designs with technology and region constraintsHuang, C.-C.; Lee, H.-Y.; Lin, B.-Q.; Yang, S.-W.; Chang, C.-H.; Chen, S.-T.; Chang, Y.-W.; YAO-WEN CHANG 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015 130
772016Fast lithographic mask optimization considering process variationSu, Y.-H.; Huang, Y.-C.; Tsai, L.-C.; Chang, Y.-W.; Banerjee, S.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1419
782016Simultaneous EUV flare variation minimization and CMP control by coupling-aware dummificationChiang, H.-J.K.; Liu, C.-Y.; Jiang, J.-H.R.; Chang, Y.-W.; YAO-WEN CHANG ; JIE-HONG JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 23
792016Provably good max-min-m-neighbor-TSP-based subfield scheduling for electron-beam photomask fabricationLin, Z.-W.; Fang, S.-Y.; Chang, Y.-W.; Rao, W.-C.; Kuan, C.-H.; CHIEH-HSIUNG KUAN ; YAO-WEN CHANG 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015 00
802016Overlay-Aware Detailed Routing for Self-Aligned Double Patterning Lithography Using the Cut ProcessLiu, Iou-Jen; Fang, Shao-Yun; Chang, Yao-Wen; YAO-WEN CHANG Ieee Transactions on Computer-Aided Design of Integrated Circuits and Systems34
812016Recent research development and new challenges in analog layout synthesisLin, M.P.-H.; Chang, Y.-W.; Hung, C.-M.; YAO-WEN CHANG Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC160
822016Circular-contour-based obstacle-aware macro placementChiou, C.-H.; Chang, C.-H.; Chen, S.-T.; Chang, Y.-W.; YAO-WEN CHANG Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC80
832016Redistribution layer routing for integrated fan-out wafer-level chip-scale packagesLin, B.-Q.; Lin, T.-C.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD20
842016VCR: Simultaneous via-template and cut-template-aware routing for directed self-assembly technologySu, Y.-H.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD30
852015Stitch-aware routing for multiple e-beam lithographyLiu, I.-J.; Fang, S.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 23
862015Buffered clock tree synthesis considering self-heating effectsLin, C.-W.; Hsu, T.-H.; Shih, X.-W.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Low Power Electronics and Design 00
872015Detailed-Routing-Driven analytical standard-cell placementHuang, C.-C.; Chiou, C.-H.; Tseng, K.-H.; Chang, Y.-W.; YAO-WEN CHANG 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 130
882015Layout-dependent-effects-aware analytical analog placementOu, H.-C.; Tseng, K.-H.; Liu, J.-Y.; Wu, I.-P.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference130
892015ForewordChang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design00
902015Nanowire-aware routing considering high cut mask complexitySu, Y.-H.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference110
912015Non-stitch triple patterning-aware routing based on conflict graph pre-coloringHsu, P.-Y.; Chang, Y.-W.; YAO-WEN CHANG 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 70
922015Layout decomposition for Spacer-is-Metal (SIM) self-aligned double patterningFang, S.-Y.; Tai, Y.-S.; Chang, Y.-W.; YAO-WEN CHANG 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 60
932015Efficient and effective packing and analytical placement for large-scale heterogeneous FPGASChen, Y.-C.; Chen, S.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design190
942015Cutting structure-aware analog placement based on self-aligned double patterning with e-beam lithographyOu, H.-C.; Tseng, K.-H.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference20
952015Coupling-aware length-ratio-matching routing for capacitor arrays in analog integrated circuitsHo, K.-H.; Ou, H.-C.; Chang, Y.-W.; Tsao, H.-F.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 88
962015EUV and e-beam manufacturability: Challenges and solutionsChang, Y.-W.; Liu, R.-G.; Fang, S.-Y.; YAO-WEN CHANG Design Automation Conference80
972015Routing-architecture-aware analytical placement for heterogeneous FPGASChen, S.-Y.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference110
982015Fast lithographic mask optimization considering process variationSu, Y.-H.; Huang, Y.-C.; Tsai, L.-C.; Chang, Y.-W.; Banerjee, S.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design80
992015Identification of a novel platelet antagonist that binds to CLEC-2 and suppresses podoplanin-induced platelet aggregation and cancer metastasisChang, Yao-Wen; Hsieh, Pei-Wen; Chang, Yu-Tsui; Lu, Meng-Hong; Huang, Tur-Fu; Chong, Kowit-Yu; Liao, Hsiang-Ruei; Cheng, Ju-Chien; Tseng, Ching-Ping; YAO-WEN CHANG Oncotarget4646
1002014Simultaneous EUV Flare Variation Minimization and CMP Control with Coupling-Aware DummificationChi-Yuan Liu; Hui-Ju K. Chiang; Yao-Wen Chang; Jie-Hong R. Jiang; YAO-WEN CHANG ; JIE-HONG JIANG ACM/IEEE Design Automation Conference (DAC) 40
1012014Nonuniform multilevel analog routing with matching constraintsOu, H.-C.; Chien, H.-C.C.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 811
1022014Routability-driven blockage-aware macro placementChen, Y.-F.; Huang, C.-C.; Chiou, C.-H.; Chang, Y.-W.; Wang, C.-J.; YAO-WEN CHANG Design Automation Conference110
1032014Overlay-Aware detailed routing for self-Aligned double patterning lithography using the cut processLiu, I.-J.; Fang, S.-Y.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference250
1042014Simultaneous EUV flare- and CMP-aware placementLiu, C.-Y.; Chang, Y.-W.; YAO-WEN CHANG 2014 32nd IEEE International Conference on Computer Design, ICCD 2014 40
1052014A novel layout decomposition algorithm for triple patterning lithographyFang, S.-Y.; Chang, Y.-W.; Chen, W.-Y.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 3841
1062014A new asynchronous pipeline template for power and performance optimizationHo, K.-H.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference60
1072014Functional ECO using metal-configurable gate-array spare cellsChang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference10
1082014Buffered clock tree synthesis considering self-heating effectsLin, C.-W.; Hsu, T.-H.; Shih, X.-W.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Low Power Electronics and Design 10
1092014Obstacle-avoiding free-assignment routing for flip-chip designsHo, Y.-K.; Lee, H.-C.; Lee, W.; Chang, Y.-W.; Chang, C.-F.; Lin, I.-J.; Shen, C.-F.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 35
1102014The IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2014, San Jose, CA, USA, November 3-6, 2014YAO-WEN CHANG 
1112014Theory of charge transport in molecular junctions: From Coulomb blockade to coherent tunnelingChang, Y.-W.; Jin, B.-Y.; YAO-WEN CHANG Journal of Chemical Physics33
1122014NTUplace4h: A novel routability-driven placement algorithm for hierarchical mixed-size circuit designsHsu, M.-K.; Chen, Y.-F.; Huang, C.-C.; Chou, S.; Lin, T.-H.; Chen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2326
1132014Design and Implementation of a RESTful Notification Service.Chang, Yao-Wen; Sheu, Ruey-Kai; Jhu, Syuan-Ru; Chang, Yue-Shan; YAO-WEN CHANG Intelligent Systems and Applications - Proceedings of the International Computer Symposium (ICS) held at Taichung, Taiwan, December 12-14, 201400
1142013Stitch-aware routing for multiple e-beam lithographyFang, S.-Y.; Liu, I.-J.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference90
1152013Layer minimization in escape routing for staggered-pin-array PCBsHo, Y.-K.; Shih, X.-W.; Chang, Y.-W.; Cheng, C.-K.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 40
1162013ECO optimization using metal-configurable gate-array spare cellsChang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 22
1172013Symmetrical buffered clock-tree synthesis with supply-voltage alignmentShih, X.-W.; Hsu, T.-H.; Lee, H.-C.; Chang, Y.-W.; Chao, K.-Y.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 20
1182013Escape routing for staggered-pin-array PCBsHo, Y.-K.; Lee, H.-C.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 68
1192013Simultaneous OPC- and CMP-aware routing based on accurate closed-form modelingFang, S.-Y.; Lin, C.-W.; Liao, G.-W.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 10
1202013Technical perspective: Circuit placement challengesChang, Y.-W.; YAO-WEN CHANG Communications of the ACM 11
1212013Graph-based subfield scheduling for electron-beam photomask fabricationFang, S.-Y.; Chen, W.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 67
1222013TSV-aware analytical placement for 3-D IC designs based on a novel weighted-average wirelength modelHsu, M.-K.; Balabanov, V.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 4539
1232013Double patterning lithography-aware analog placementChien, H.-C.C.; Ou, H.-C.; Chen, T.-C.; Kuan, T.-Y.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference40
1242013Routability-driven placement for hierarchical mixed-size circuit designsHsu, M.-K.; Chen, Y.-F.; Huang, C.-C.; Chen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference220
1252013Simultaneous analog placement and routing with current flow and current density considerationsOu, H.-C.; Chien, H.-C.C.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference180
1262013Coupling-Aware length-ratio-matching routing for capacitor arrays in analog integrated circuitsHo, K.-H.; Ou, H.-C.; Chang, Y.-W.; Tsao, H.-F.; YAO-WEN CHANG Design Automation Conference60
1272013An efficient and effective analytical placer for FPGAsLin, T.-H.; Banerjee, P.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference280
1282013Multiple chip planning for chip-interposer codesignHo, Y.-K.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference160
1292013Numerical and experimental investigation of polycarbonate vacuum-forming processChang, Yao-Wen; Cheng, Jung-Ho; YAO-WEN CHANG Journal of the Chinese Institute of Engineers34
1302012Fast timing-model independent buffered clock-tree synthesisShih, X.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 87
1312012A chip-package-board co-design methodologyLee, H.-C.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference40
1322012Structure-aware placement for datapath-intensive circuit designsChou, S.; Hsu, M.-K.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference210
1332012Non-uniform multilevel analog routing with matching constraintsOu, H.-C.; Chien, H.-C.C.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference170
1342012Statistical thermal modeling and optimization considering leakage power variationsJuan, D.-C.; Chuang, Y.-L.; Marculescu, D.; Chang, Y.-W.; YAO-WEN CHANG Design, Automation and Test in Europe, DATE 9
1352012Timing ECO optimization using metal-configurable gate-array spare cellsChang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference 40
1362012Native-conflict and stitch-aware wire perturbation for double patterning technologyFang, S.-Y.; Chen, S.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2016
1372012Unified analytical global placement for large-scale mixed-size circuit designsHsu, M.-K.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1616
1382012Graph-based subfield scheduling for electron-beam photomask fabricationFang, S.-Y.; Chen, W.-Y.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 30
1392012Timing ECO optimization via B?zier curve smoothing and fixability identificationChang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 88
1402012An efficient Pre-assignment routing algorithm for flip-chip designsLin, C.-W.; Lee, P.-W.; Chang, Y.-W.; Shen, C.-F.; Tseng, W.-C.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 67
1412012A novel layout decomposition algorithm for triple patterning lithographyFang, S.-Y.; Chang, Y.-W.; Chen, W.-Y.; YAO-WEN CHANG Design Automation Conference430
1422012TRECO: Dynamic technology remapping for timing engineering change ordersHo, K.-H.; Jiang, J.-H.R.; Chang, Y.-W.; YAO-WEN CHANG ; JIE-HONG JIANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 88
1432012Obstacle-avoiding free-assignment routing for flip-chip designsLee, P.-W.; Lee, H.-C.; Ho, Y.-K.; Chang, Y.-W.; Chang, C.-F.; Lin, I.-J.; Shen, C.-F.; YAO-WEN CHANG Design Automation Conference10
1442012Simultaneous flare level and flare variation minimization with dummification in EUVLFang, S.-Y.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference120
1452012Correlation effects of πelectrons on the band structures of conjugated polymers using the self-consistent GW approximation with vertex correctionsChang, Y.-W.; Jin, B.-Y.; YAO-WEN CHANG Journal of Chemical Physics66
1462012Self-interaction correction to GW approximationChang, Y.-W.; Jin, B.-Y.; YAO-WEN CHANG Physica Scripta44
1472012Material characterization of polycarbonate near glass transition temperatureChang, Yao-Wen; Cheng, Jung-Ho; YAO-WEN CHANG Journal of the Chinese Institute of Engineers12
1482012Statistical thermal modeling and optimization considering leakage power variations.Juan, Da-Cheng; Chuang, Yi-Lin; Marculescu, Diana; Chang, Yao-Wen; YAO-WEN CHANG 2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March 12-16, 201200
1492011Simultaneous functional and timing ECOChang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference15
1502011Routability-driven analytical placement for mixed-size circuit designsHsu, M.-K.; Chou, S.; Lin, T.-H.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design510
1512011Escape routing for staggered-pin-array PCBsHo, Y.-K.; Lee, H.-C.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design100
1522011Cross-contamination aware design methodology for pin-constrained digital microfluidic biochipsLin, C.C.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 4031
1532011Proceedings of the International Symposium on Physical Design: ForewordChang, Y.-W.; Hu, J.; YAO-WEN CHANG International Symposium on Physical Design 0
1542011Thermal-driven analog placement considering device matchingLin, M.P.-H.; Zhang, H.; Wong, M.D.F.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2217
1552011Voltage-drop aware analytical placement by global power spreading for mixed-size circuit designsChuang, Y.-L.; Lee, P.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 23
1562011Simultaneous layout migration and decomposition for double patterning technologyHsu, C.-H.; Chang, Y.-W.; Nassif, S.R.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1917
1572011Hierarchical placement with layout constraintsLin, M.P.-H.; Chang, Y.-W.; YAO-WEN CHANG Analog Layout Synthesis: A Survey of Topological Approaches 30
1582011An EOS-Free PNP-enhanced cascoded NMOSFET structure for high voltage applicationWang, S.-Y.; Chang, Y.-W.; Chen, Y.-Y.; He, C.-W.; Wu, G.-W.; Lu, T.-C.; Chen, K.-C.; Lu, C.-Y.; YAO-WEN CHANG IEEE International Reliability Physics Symposium20
1592011A corner stitching compliant B-tree representation and its applications to analog placementTsao, H.-F.; Chou, P.-Y.; Huang, S.-L.; Chang, Y.-W.; Lin, M.P.-H.; Chen, D.-P.; Liu, D.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design170
1602011Pulsed-latch aware placement for timing-integrity optimizationChuang, Y.-L.; Kim, S.; Shin, Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 21
1612011IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems: Guest EditorialSaxena, P.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 00
1622011PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designsChuang, Y.-L.; Lin, H.-T.; Ho, T.-Y.; Chang, Y.-W.; Marculescu, D.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design70
1632011Timing ECO optimization via B?zier curve smoothing and fixability identificationChang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design20
1642011Heterogeneous B*-trees for analog placement with symmetry and regularity considerationsChou, P.-Y.; Ou, H.-C.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design160
1652011TSV-aware analytical placement for 3D IC designsHsu, M.-K.; Chang, Y.-W.; Balabanov, V.; YAO-WEN CHANG Design Automation Conference 52
1662011Proceedings of the 2011 International Symposium on Physical Design, ISPD 2011, Santa Barbara, California, USA, March 27-30, 2011YAO-WEN CHANG 00
1672011A SAT-based routing algorithm for cross-referencing biochipsYuh, P.-H.; Lin, C.C.-Y.; Huang, T.-W.; Ho, T.-Y.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG ; CHIA-LIN YANG International Workshop on System Level Interconnect Prediction, SLIP 70
1682011Simultaneous functional and timing ECO.Chang, Hua-Yu; Jiang, Iris Hui-Ru; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011150
1692011TSV-aware analytical placement for 3D IC designs.Hsu, Meng-Kai; Chang, Yao-Wen; Balabanov, Valeriy; YAO-WEN CHANG Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011520
1702010Effect of Broken Symmetry on the First Hyperpolarizability of a Centrosymmetric Molecule with an Application to Furan-Containing [2.2]CyclophandieneYao-Wen Chang; Bih-Yaw Jin; Chang, Yao-Wen ; BIH-YAW JIN Journal of the Chinese Chemical Society 11
1712010TRECO: Dynamic Technology Remapping for Timing Engineering Change OrdersKuan-Hsien Ho; Jie-Hong R. Jiang; Yao-Wen Chang; YAO-WEN CHANG ; JIE-HONG JIANG Asia and South Pacific Design Automation Conference (ASP-DAC'10) 148
1722010Pulsed-latch aware placement for timing-integrity optimizationChuang, Y.-L.; Kim, S.; Shin, Y.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference190
1732010Three-dimensional integrated circuits (3D IC) floorplan and power/ground network co-synthesisFalkenstern, P.; Xie, Y.; Chang, Y.-W.; Wang, Y.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 500
1742010ECO timing optimization using spare cells and technology remappingHo, K.-H.; Chen, Y.-P.; Fang, J.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1514
1752010Unified analytical global placement for large-scale mixed-size circuit designsHsu, M.-K.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design70
1762010Multilayer global routing with via and wire capacity considerationsHsu, C.-H.; Chen, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1213
1772010Design-hierarchy aware mixed-size placement for routability optimizationChuang, Y.-L.; Nam, G.-J.; Alpert, C.J.; Chang, Y.-W.; Roy, J.; Viswanathan, N.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design210
1782010Density gradient minimization with coupling-constrained dummy fill for CMP controlChen, H.-Y.; Chou, S.-J.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 160
1792010Fast timing-model independent buffered clock-tree synthesisShih, X.-W.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference200
1802010Predictive formulae for OPC with applications to lithography-friendly routingChen, T.-C.; Liao, G.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 119
1812010Native-conflict-aware wire perturbation for double patterning technologyChen, S.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design220
1822010Efficient provably good OPC modeling and its applications to interconnect optimizationHuang, S.-L.; Lin, C.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE International Conference on Computer Design: VLSI in Computers and Processors 00
1832010Cross-contamination aware design methodology for pin-constrained digital microfluidic biochipsLin, C.C.-Y.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference230
1842010ILP-based pin-count aware design methodology for microfluidic biochipsLin, C.C.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2722
1852010Blockage-avoiding buffered clock-tree synthesis for clock latency-range and skew minimizationShih, X.-W.; Cheng, C.-C.; Ho, Y.-K.; Chang, Y.-W.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 230
1862010Area-I/O flip-chip routing for chip-package co-design considering signal skewsFang, J.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1517
1872010Redundant-wires-aware ECO timing and mask cost optimizationFang, S.-Y.; Chien, T.-F.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design150
1882010High variation-tolerant obstacle-avoiding clock mesh synthesis with symmetrical driving treesShiht, X.-W.; Leet, H.-C.; Hot, K.-H.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design200
1892010Template-mask design methodology for double patterning technologyHsu, C.-H.; Chang, Y.-W.; Nassif, S.R.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design20
1902010Recent research development in flip-chip routing.Lee, Hsu-Chieh; Chang, Yao-Wen; Lee, Po-Wei; YAO-WEN CHANG 2010 International Conference on Computer-Aided Design, ICCAD 2010, San Jose, CA, USA, November 7-11, 201090
1912010Compositional dependence of phase formation mechanisms at the interface between titanium and calcia-stabilized zirconia at 1550°CChang, Y.-W.; Lin, C.-C.; YAO-WEN CHANG Journal of the American Ceramic Society2218
1922010Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010YAO-WEN CHANG 00
1932010Design of an Omnidirectional Multibeam Transmitter for High-Speed Indoor Wireless Communications.Tang, Jaw-Luen; Chang, Yao-Wen; YAO-WEN CHANG EURASIP J. Wireless Comm. and Networking30
1942009T-trees: A tree-based representation for temporal and three-dimensional floorplanningYuh, P.-H.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG ; CHIA-LIN YANG ACM Transactions on Design Automation of Electronic Systems 41
1952009Analog layout synthesis - Recent advances in topological approachesGraeb, H.; Balasa, F.; Castro-Lopez, R.; Chang, Y.-W.; Fern; ez, F.V.; Lin, P.-H.; Strasser, M.; YAO-WEN CHANG Design, Automation and Test in Europe, DATE 28
1962009Spare-cell-aware multilevel analytical placementJiang, Z.-W.; Hsu, M.-K.; Chang, Y.-W.; Chao, K.-Y.; YAO-WEN CHANG Design Automation Conference6
1972009High-performance global routing with fast overflow reductionQien, H.-Y.; Hsu, C.-H.; Chang, Y.-W.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 480
1982009Essential issues in analytical placement algorithmsChang, Y.-W.; Jiang, Z.-W.; Chen, T.-C.; YAO-WEN CHANG IPSJ Transactions on System LSI Design Methodology 300
1992009Voltage-drop aware analytical placement by global power spreading for mixed-size circuit designsChuang, Y.-L.; Lee, P.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design4
2002009A novel hot-electron programming method in a buried diffusion bit-line SONOS memory by utilizing nonequilibrium charge transportWang, T.; Tang, C.-J.; Li, C.-W.; Lee, C.-H.; Ou, T.-F.; Chang, Y.-W.; Tsai, W.-J.; Lu, T.-C.; Chen, K.-C.; Lu, C.-Y.; YAO-WEN CHANG IEEE Electron Device Letters 00
2012009Voltage-island partitioning and floorplanning under timing constraintsLee, W.-P.; Liu, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1310
2022009Electronic Design AutomationWang, L.-T.; Chang, Y.-W.; Cheng, K.-T.; YAO-WEN CHANG Electronic Design Automation 800
2032009Simultaneous layout migration and decomposition for double patterning technologyHsu, C.-H.; Chang, Y.-W.; Nassif, S.R.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design26
2042009FloorplanningChen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG Electronic Design Automation 20
2052009Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designsLee, W.-P.; Marculescu, D.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 90
2062009Global and Detailed RoutingChen, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG Electronic Design Automation 80
2072009A progressive-ILP-based routing algorithm for the synthesis of cross-referencing biochipsYuh, P.-H.; Sapatnekar, S.S.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG ; CHIA-LIN YANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 25
2082009Voltage-Island partitioning and floorplanning under timing constraintsLee, W.-P.; Liu, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 110
2092009Thermal-driven analog placement considering device matchingLin, P.-H.; Zhang, H.; Wong, M.D.F.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference 20
2102009Routing for manufacturability and reliabilityChen, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Circuits and Systems Magazine 67
2112009ILP-based pin-count aware design methodology for microfluidic biochipsLin, C.C.-Y.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference26
2122009IntroductionStroud, C.E.; Wang, L.T.; Chang, Y.-W.; YAO-WEN CHANG Electronic Design Automation 00
2132009Analog placement based on symmetry-Island formulationLin, P.-H.; Chang, Y.-W.; Lin, S.-C.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 853
2142009BIST design optimization for large-scale embedded memory coresChien, T.-F.; Chao, W.-C.; Li, C.-M.; Chang, Y.-W.; Liao, K.-Y.; Chang, M.-T.; Tsai, M.-H.; Tseng, C.-M.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design7
2152009An integer-linear-programming-based routing algorithm for flip-chip designsFang, J.-W.; Hsu, C.-H.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2623
2162009Flip-chip routing with unified area-I/O pad assignments for package-board co-designFang, J.-W.; Wong, M.D.F.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference27
2172009An efficient pre-assignment routing algorithm for flip-chip designsLee, P.-W.; Lin, C.-W.; Chang, Y.-W.; Shen, C.-F.; Tseng, W.-C.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design15
2182009Analog placement based on symmetry-island formulationLin, P.-H.; Chang, Y.-W.; Lin, S.-C.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 4953
2192009A novel wire-density-driven full-chip routing system for CMP variation controlChen, H.-Y.; Chou, S.-J.; Wang, S.-L.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1
2202009A novel wire-density-driven full-chip routing system for cmp variation controlChen, H.-Y.; Chou, S.-J.; Wang, S.-L.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2019
2212009ILP-based pin-count aware design methodology for microfluidic biochips.Lin, Cliff Chiung-Yu; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009260
2222009Simultaneous layout migration and decomposition for double patterning technology.Hsu, Chin-Hsiung; Chang, Yao-Wen; Nassif, Sani R.; YAO-WEN CHANG 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009260
2232009Thermal-driven analog placement considering device matching.Lin, Mark Po-Hung; Zhang, Hongbo; Wong, Martin D. F.; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009200
2242009Voltage-drop aware analytical placement by global power spreading for mixed-size circuit designs.Chuang, Yi-Lin; Lee, Po-Wei; Chang, Yao-Wen; YAO-WEN CHANG 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 200940
2252009An efficient pre-assignment routing algorithm for flip-chip designs.Lee, Po-Wei; Lin, Chung-Wei; Chang, Yao-Wen; Shen, Chin-Fang; Tseng, Wei-Chih; YAO-WEN CHANG 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009150
2262009BIST design optimization for large-scale embedded memory cores.Chien, Tzuo-Fan; Chao, Wen-Chi; Li, James Chien-Mo; Chang, Yao-Wen; Liao, Kuan-Yu; Chang, Ming-Tung; Tsai, Min-Hsiu; Tseng, Chih-Mou; YAO-WEN CHANG 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 200970
2272009Flip-chip routing with unified area-I/O pad assignments for package-board co-design.Fang, Jia-Wei; Wong, Martin D. F.; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 2009270
2282009Spare-cell-aware multilevel analytical placement.Jiang, Zhe-Wei; Hsu, Meng-Kai; Chang, Yao-Wen; Chao, Kai-Yuan; YAO-WEN CHANG Proceedings of the 46th Design Automation Conference, DAC 2009, San Francisco, CA, USA, July 26-31, 200960
2292008An Efficient Graph-Based Algorithm for ESD Current Path AnalysisC. H. Liu; H. Y. Liu; C. W. Lin; S. J. Chou; Y. W. Chang; S. Y. Kuo; S. Y. Yuan; Y. W. Chen; SY-YEN KUO ; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 62
2302008奈米IC設計之前瞻電子設計自動化技術-子計畫五:在奈米製程下考量可製造性和可靠度之實體設計 (新制多年期第1年)張耀文 
2312008奈米IC設計之前瞻電子設計自動化技術-總計畫 (新制多年期第1年)張耀文 
2322008超大型奈米積體電路無格線式全晶片繞線系統之研究(3/3)張耀文 
2332008兆級晶片系統前瞻技術研究-子計畫六:兆級晶片系統實體整合之研究(2/3)張耀文 
2342008A progressive-ILP based routing algorithm for cross-referencing biochipsYuh, Ping-Hung; Sapatnekar, S.; Yang, Chia-Lin; Chang, Yao-Wen; YAO-WEN CHANG ; CHIA-LIN YANG Design Automation Conference590
2352008NTUplace3: An analytical placer for large-scale mixed-size designs with preplaced blocks and density constraintsChen, T.-C.; Jiang, Z.-W.; Hsu, T.-C.; Chen, H.-C.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 169156
2362008Routing for chip-package-board co-design considering differential pairsFang, J.-W.; Ho, K.-H.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design170
2372008NTUplace3: An Analytical Placer for Large-Scale Mixed-Size Designs With Preplaced Blocks and Density ConstraintsChen, Tung-Chieh; Jiang, Zhe-Wei; Hsu, Tien-Chang; Chen, Hsin-Chen; Chang, Yao-Wen IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 156
2382008Effective Wire Models for X-Architecture PlacementChen, Tung-Chieh; Chuang, Yi-Lin; Chang, Yao-Wen IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1
2392008Full-Chip Routing Considering Double-Via InsertionChen, Huang-Yu; Chiang, Mei-Fang; Chang, Yao-Wen ; Chen, Lumdo; Han, B.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 46
2402008A New Multilevel Framework for Large-Scale Interconnect-Driven FloorplanningChen, Tung-Chieh; Chang, Yao-Wen ; Lin, Shyh-ChangIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 22
2412008Area-I/O flip-chip routing for chip-package co-designFang, J.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design320
2422008Multilayer obstacle-avoiding rectilinear steiner tree construction based on spanning graphsLin, C.-W.; Huang, S.-L.; Hsu, K.-C.; Lee, M.-X.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1518
2432008A new multilevel framework for large-scale interconnect-driven floorplanningChen, T.-C.; Chang, Y.-W.; Lin, S.-C.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2322
2442008Sensitivity-based multiple-Vt cell swapping for leakage power reductionLee, W.-P.; Liu, H.-Y.; Ho, K.-H.; Chang, Y.-W.; YAO-WEN CHANG 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT 10
2452008Metal-density driven placement for CMP variation and routabilityChen, T.-C.; Cho, M.; Pan, D.Z.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 60
2462008MP-trees: A packing-based macro placement algorithm for modern mixed-size designsChen, T.-C.; Yuh, P.-H.; Chang, Y.-W.; Huang, F.-J.; Liu, T.-Y.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2424
2472008Effective wire models for X-architecture placementChen, T.-C.; Chuang, Y.-L.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 11
2482008Constraint graph-based macro placement for modern mixed-size circuit designsChen, H.-C.; Chuang, Y.-L.; Chang, Y.-W.; Chang, Y.-C.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design220
2492008An optimal network-flow-based simultaneous diode and jumper insertion algorithm for antenna fixingJiang, Z.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 85
2502008Obstacle-Avoiding Rectilinear Steiner Tree Construction Based on Spanning GraphsLin, Chung-Wei; Chen, Szu-Yu; Li, Chi-Feng; Chang, Yao-Wen ; Yang, Chia-Lin IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 40
2512008BioRoute: A network-flow-based routing algorithm for the synthesis of digital microfluidic biochipsYuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; YAO-WEN CHANG ; Yang, Chia-Lin IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 6448
2522008Metal-density-driven placement for CMP variation and routabilityChen, T.-C.; Cho, M.; Pan, D.Z.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1111
2532008Multi-layer global routing considering via and wire capacitiesHsu, C.-H.; Chen, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design260
2542008Predictive formulae for OPC with applications to lithography-friendly routingChen, T.-C.; Liao, G.-W.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference200
2552008Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designsJiang, Z.-W.; Su, B.-Y.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference340
2562008Full-chip routing considering double-via insertionChen, H.-Y.; Chiang, M.-F.; Chang, Y.-W.; Chen, L.; Han, B.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 6046
2572008Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs.Jiang, Zhe-Wei; Su, Bor-Yiing; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 200800
2582008Predictive formulae for OPC with applications to lithography-friendly routing.Chen, Tai-Chen; Liao, Guang-Wan; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 200800
2592008A progressive-ILP based routing algorithm for cross-referencing biochips.Yuh, Ping-Hung; Sapatnekar, Sachin S.; Yang, Chia-Lin; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 200800
2602008Packing Floorplan Representations.Chen, Tung-Chieh; Chang, Yao-Wen; YAO-WEN CHANG Handbook of Algorithms for Physical Design Automation.
2612008Effect of yttria on interfacial reactions between titanium melt and hot-pressed yttria/zirconia composites at 1700°cLin, C.-C.; Chang, Y.-W.; Lin, K.-L.; YAO-WEN CHANG Journal of the American Ceramic Society1713
2622008Obstacle-avoiding rectilinear steiner tree construction based on spanning graphsLin, C.-W.; Chen, S.-Y.; Li, C.-F.; Chang, Y.-W.; Yang, C.-L.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems4440
2632007兆級晶片系統前瞻技術研究-子計畫六:兆級晶片系統實體整合之研究(3/3)張耀文 
2642007車用聚碳酸酯風擋及車窗之設計及熱成形技術研究鄭榮和 ; 張耀文 ; 張智凱; 李聚儒
2652007X-route: An x-architecture full-chip multilevel routerChang, C.-F.; Chang, Y.-W.; YAO-WEN CHANG 20th Anniversary IEEE International SOC Conference 40
2662007Placement of defect-tolerant digital microfluidic biochips using the T-tree formulationYuh, P.-H.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG ; Yang, Chia-Lin ACM Journal on Emerging Technologies in Computing Systems 7157
2672007Novel wire density driven full-chip routing for CMP variation controlChen, H.-Y.; Chou, S.-J.; Wang, S.-L.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design160
2682007Statistical circuit optimization considering device andinterconnect process variationsLin, I.-J.; Ling, T.-Y.; Chang, Y.-W.; YAO-WEN CHANG International Workshop on System Level Interconnect Prediction, SLIP 40
2692007An integer linear programming based routing algorithm for flip-chip designFang, J.-W.; Hsu, C.-H.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference480
2702007A network-flow-based RDL routing algorithmz for flip-chip designFang, J.-W.; Lin, I.-J.; Chang, Y.-W.; Wang, J.-H.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 4337
2712007A new interference phenomenon in sub-60nm nitride-based flash memoryChang, Y.W.; YAO-WEN CHANG et al. 22nd IEEE Non-Volatile Semiconductor Memory Workshop50
2722007An efficient algorithm for statistical circuit optimization using Lagrangian relaxationLin, I.-J.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design20
2732007An Optimal Jumper-Insertion Algorithm for Antenna Avoidance/FixingSu, Bor-Yiing; Su, Bor-Yiing; Chang, Yao-Wen IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 5
2742007An Exact Jumper-Insertion Algorithm for Antenna Violation Avoidance/Fixing Considering Routing ObstaclesSu, Bor-Yiing; Chang, Yao-Wen ; Hu, JiangIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2
2752007A Network-Flow-Based RDL Routing Algorithm for Flip-Chip DesignFang, Jia-Wei; Lin, I-Jye; Chang, Yao-Wen ; Wang, Jyh-HerngIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 
2762007X-architecture placement based on effective wire modelsChen, T.-C.; Chuang, Y.-L.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 10
2772007Challenges and solutions in modern VLSI placementJiang, Z.-W.; Chen, H.-.; Chen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG 2007 International Symposium on VLSI Design, Automation and Test30
2782007Power/ground network and floorplan cosynthesis for fast design convergenceLiu, C.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1913
2792007MB^*-Tree: A Multilevel Floorplanner for Large-Scale Building-Module DesignLee, Hsun-Cheng; Chang, Yao-Wen ; Yang, Hannah HonghuaIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 
2802007Power/Ground Network and Floorplan Cosynthesis for Fast Design ConvergenceLiu, Chen-Wei; Chang, Yao-Wen IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 13
2812007Multilevel Full-Chip Gridless Routing With Applications to Optical-Proximity CorrectionChen, Tai-Chen; Chang, Yao-Wen IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 13
28220073D video applications and intelligent video surveillance camera and its VLSI designChien, S.-Y.; Shih, C.-S.; Ku, M.-K.; Yang, C.-L.; Chang, Y.-W.; Kuo, T.-W.; Chen, L.-G.; YAO-WEN CHANG 2007 IEEE International Conference on Multimedia and Expo, ICME 2007 0
2832007Efficient multi-layer obstacle-avoiding rectilinear steiner tree constructionLin, C.-W.; Huang, S.-L.; Hsu, K.-C.; Li, M.-X.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design140
2842007Bioroute: A Network-Flow Based Routing Algorithm for Digital Microfluidic BiochipsYuh, Ping-Hung; Yang, Chia-Lin ; Chang, Yao-Wen IEEE/ACM International Conference on Computer-Aided Design780
2852007Post Placement Leakage Optimization for Partially Dynamic Reconfigurable FPGAsLi, Chi-Feng; Yuh, Ping-Hung; Yang, Chia-Lin ; Chang, Yao-Wen International Symposium on Low Power Electronics and Design 60
2862007Multilevel full-chip gridless routing with applications to optical-proximity correctionChen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 1913
2872007Multilevel full-chip routing with testability and yield enhancementLi, K.S.-M.; Chang, Y.-W.; Lee, C.-L.; Su, C.; Chen, J.E.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 105
2882007MP-trees: A packing-based macro placement algorithm for mixed-size designsChen, T.-C.; Yuh, P.-H.; Chang, Y.-W.; Huang, F.-J.; Liu, D.; YAO-WEN CHANG Design Automation Conference100
2892007Temporal floorplanning using the three-dimensional transitive closure subGraphYuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; Yu, P.-H.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG ; Yang, Chia-Lin ACM Transactions on Design Automation of Electronic Systems 2116
2902007An exact jumper-insertion algorithm for antenna violation avoidance/fixing considering routing obstaclesSu, B.-Y.; Chang, Y.-W.; Hu, J.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 52
2912007Thermal-driven interconnect optimization by simultaneous gate and wire sizingLin, Y.-W.; Chang, Y.-W.; YAO-WEN CHANG 2006 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 200600
2922007Efficient obstacle-avoiding rectilinear steiner tree constructionLin, C.-W.; Chen, S.-Y.; Li, C.-F.; Chang, Y.-W.; Yang, C.-L.; YAO-WEN CHANG ; CHIA-LIN YANG International Symposium on Physical Design 350
2932007Recent research and emerging challenges in physical design for manufacturability/reliabilityLin, C.-W.; Tsai, M.-C.; Lee, K.-Y.; Chen, T.-.; Wang, T.-C.; Chang, Y.-W.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 110
2942007A statistical approach to the timing-yield optimization of pipeline circuitsHsu, C.-H.; Chou, S.-J.; Jiang, J.-H.R.; Chang, Y.-W.; YAO-WEN CHANG Lecture Notes in Computer Science0
2952007An optimal jumper-insertion algorithm for antenna avoidance/fixingSu, B.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 85
2962007ECO timing optimization using spare cellsChen, Y.-P.; Fang, J.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design410
2972007MB*-tree: A multilevel floorplanner for large-scale building-module designLee, H.-C.; Chang, Y.-W.; Yang, H.H.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 42
2982007An ILP algorithm for post-floorplanning voltage-island generation considering power-network planning.Lee, Wan-Ping; Liu, Hung-Yi; Chang, Yao-Wen; YAO-WEN CHANG 2007 International Conference on Computer-Aided Design, ICCAD 2007, San Jose, CA, USA, November 5-8, 2007550
2992007MP-trees: A Packing-Based Macro Placement Algorithm for Mixed-Size Designs.Chen, Tung-Chieh; Yuh, Ping-Hung; Chang, Yao-Wen; Huang, Fwu-Juh; Liu, Denny; YAO-WEN CHANG Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 200700
3002007An Integer Linear Programming Based Routing Algorithm for Flip-Chip Design.Fang, Jia-Wei; Hsu, Chin-Hsiung; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 200700
3012007A Provably Good Approximation Algorithm for Power Optimization Using Multiple Supply Voltages.Liu, Hung-Yi; Lee, Wan-Ping; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 200700
3022007NTUplace3: An Analytical Placer for Large-Scale Mixed-Size Designs.Chen, Tung-Chieh; Jiang, Zhe-Wei; Hsu, Tien-Chang; Chen, Hsin-Chen; Chang, Yao-Wen; YAO-WEN CHANG Modern Circuit Placement, Best Practices and Results
3032007Full-Chip Nanometer Routing Techniques.Ho, Tsung-Yi; Chang, Yao-Wen; Chen, Sao-Jie; YAO-WEN CHANG 
3042007A Statistical Approach to the Timing-Yield Optimization of Pipeline Circuits.Hsu, Chin-Hsiung; Chou, Szu-Jui; Jiang, Jie-Hong Roland; Chang, Yao-Wen; YAO-WEN CHANG Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation, 17th International Workshop, PATMOS 2007, Gothenburg, Sweden, September 3-5, 2007, Proceedings00
30520073D Video Applications and Intelligent Video Surveillance Camera and its VLSI Design.Chien, Shao-Yi; Shih, Chi-Sheng; Ku, Mong-Kai; Yang, Chia-Lin; Chang, Yao-Wen; Kuo, Tei-Wei; Chen, Liang-Gee; YAO-WEN CHANG Proceedings of the 2007 IEEE International Conference on Multimedia and Expo, ICME 2007, July 2-5, 2007, Beijing, China00
3062007Multilevel Full-Chip Routing With Testability and Yield EnhancementLi, Katherine Shu-Min; Chang, Yao-Wen ; Lee, Chung-Len; Su, Chauchin; Chen, Jwu E.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 5
30720073D Video Applications and Intelligent Video Surveillance Camera and its VLSI DesignChien, hao-Yi; Shih, Chi-Sheng ; Ku, Mong-Kai; Yang, Chia-Lin ; Chang, Yao-Wen ; Kuo, Tei-Wei ; Chen, Liang-Gee 2007 IEEE International Conference on Multimedia and Expo, ICME 2007 0
3082006RLC Coupling-Aware Simulation and On-Chip Bus Encoding for Delay ReductionTu, Shang-Wei; Chang, Yao-Wen ; Jou, Jing-YangIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 
3092006Inductance extraction for general interconnect structuresLai, Chun-Ying; Jeng, Shyh-Kang ; Chang, Yao-Wen ; Tsai, Chia-ChunInternational Symposium on Circuits and Systems, 2006. ISCAS '0600
3102006Modern Floorplanning Based on B?-Tree and Fast Simulated AnnealingChen, Tung-Chieh; Chang, Yao-Wen IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 
3112006A novel framework for multilevel full-chip gridless routingChen, Tai-Chen; Chang, Yao-Wen ; Lin, Shyh-ChangAsia and South Pacific Conference on Design Automation, 2006. 00
3122006Simultaneous block and I/O buffer floorplanning for flip-chip designPeng, Chih-Yang; Chao, Wen-Chang; Chang, Yao-Wen ; Wang, Jyh-HerngAsia and South Pacific Conference on Design Automation, 2006. 00
3132006Simultaneous block and I/O buffer floorplanning for flip-chip designPeng, C.-Y.; Chao, W.-C.; Chang, Y.-W.; Wang, J.-H.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 13
3142006Novel full-chip gridless routing considering double-via insertionChen, H.-Y.; Chiang, M.-F.; Chang, Y.-W.; Chen, L.; Han, B.; YAO-WEN CHANG Design Automation Conference310
3152006IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faultsLi, K.S.-M.; Su, C.; Chang, Y.-W.; Lee, C.-L.; Chen, J.E.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 109
3162006RLC coupling-aware simulation and on-chip bus encoding for delay reductionTu, S.-W.; Chang, Y.-W.; Jou, J.-Y.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 3522
3172006NTUplace2: A hybrid placer using partitioning and analytical techniquesJiang, Z.-W.; Chen, T.-C.; Hsu, T.-C.; Chen, H.-C.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 23
3182006Charge-based capacitance measurement for bias-dependent capacitanceChang, Y.-W.; Chang, H.-W.; Lu, T.-C.; King, Y.-C.; Ting, W.; Ku, Y.-H.J.; Lu, C.-Y.; YAO-WEN CHANG IEEE Electron Device Letters 3833
3192006A novel framework for multilevel full-chip gridless routingChen, T.-C.; Chang, Y.-W.; Lin, S.-C.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 14
3202006Physical design for System-On-a-ChipChang, Y.-W.; Chen, T.-C.; Chen, H.-Y.; YAO-WEN CHANG Essential Issues in SOC Design: Designing Complex Systems-on-Chip 00
3212006Floorplan and power/ground network co-synthesis for fast design convergenceLiu, C.-W.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 21
3222006Voltage Island aware floorplanning for power and timing optimizationLee, W.-P.; Liu, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design730
3232006An optimal jumper insertion algorithm for antenna avoidance/fixing on general routing trees with obstaclesSu, B.-Y.; Chang, Y.-W.; Hu, J.; YAO-WEN CHANG International Symposium on Physical Design 7
3242006Inductance extraction for general interconnect structuresLai, C.-Y.; Jeng, S.-K.; Chang, Y.-W.; Tsai, C.-C.; YAO-WEN CHANG IEEE International Symposium on Circuits and Systems 0
3252006Multilevel routing with jumper insertion for antenna avoidanceHo, T.-Y.; Chang, Y.-W.; Chen, S.-J.; YAO-WEN CHANG ; SAO-JIE CHEN Integration, the VLSI Journal 52
3262006Placement of digital microfluidic biochips using the T-tree formuationYuh, Ping-Hung; Yang, Chia-Lin ; Chang, Yao-Wen 43rd annual Design Automation Conference 
3272006Reliable crosstalk-driven interconnect optimizationJiang, I.H.-R.; Pan, S.-R.; Chang, Y.-W.; Jou, J.-Y.; YAO-WEN CHANG ACM Transactions on Design Automation of Electronic Systems 131
3282006Current path analysis for electrostatic discharge protectionLiu, H.-Y.; Lin, C.-W.; Chou, S.-J.; Tu, W.-T.; Liu, C.-H.; Chang, Y.-W.; Kuo, S.-Y.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design70
3292006An optimal simultaneous diode/jumper insertion algorithm for antenna fixingJiang, Z.-W.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design40
3302006A high-quality mixed-size analytical placer considering preplaced blocks and density constraintsChen, T.-C.; Jiang, Z.-W.; Hsu, T.-C.; Chen, H.-C.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design560
3312006Modern floorplanning based on B*-tree and fast simulated annealingChen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 9266
3322006IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faultsLi, K.S.-M.; Chang, Y.-W.; Su, C.; Lee, C.-L.; Chen, J.E.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 0
3332006Novel Full-Chip Gridless Routing Considering Double-Via InsertionChen, Huang-Yu; Chiang, Mei-Fang; Chang, Yao-Wen ; Chen, Lumdo; Han, Brian
3342006IEEE Standard 1500 Compatible Interconnect Diagnosis for Delay and Crosstalk FaultsLi, Katherine Shu-Min; Su, Chauchin; Chang, Yao-Wen ; Lee, Chung-Len; Chen, Jwu E.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 9
3352006Floorplan and power/ground network co-synthesis for fast design convergence.Liu, Chen-Wei; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2006 International Symposium on Physical Design, ISPD 2006, San Jose, California, USA, April 9-12, 2006210
3362006NTUplace2: a hybrid placer using partitioning and analytical techniques.Jiang, Zhe-Wei; Chen, Tung-Chieh; Hsu, Tien-Chang; Chen, Hsin-Chen; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2006 International Symposium on Physical Design, ISPD 2006, San Jose, California, USA, April 9-12, 200600
3372006Current path analysis for electrostatic discharge protection.Liu, Hung-Yi; Lin, Chung-Wei; Chou, Szu-Jui; Tu, Wei-Ting; Liu, Chih-Hung; Chang, Yao-Wen; Kuo, Sy-Yen; YAO-WEN CHANG 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 200600
3382006An optimal simultaneous diode/jumper insertion algorithm for antenna fixing.Jiang, Zhe-Wei; Chang, Yao-Wen; YAO-WEN CHANG 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 200600
3392006Voltage island aware floorplanning for power and timing optimization.Lee, Wan-Ping; Liu, Hung-Yi; Chang, Yao-Wen; YAO-WEN CHANG 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 200600
3402006A high-quality mixed-size analytical placer considering preplaced blocks and density constraints.Chen, Tung-Chieh; Jiang, Zhe-Wei; Hsu, Tien-Chang; Chen, Hsin-Chen; Chang, Yao-Wen; YAO-WEN CHANG 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 200600
3412006Placement of digital microfluidic biochips using the t-tree formulationYuh, P.-H.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - Design Automation Conference420
3422006Reliable crosstalk-driven interconnect optimization.Jiang, Iris Hui-Ru; Pan, Song-Ra; Chang, Yao-Wen; Jou, Jing-Yang; YAO-WEN CHANG ACM Trans. Design Autom. Electr. Syst.01
3432006An optimal jumper insertion algorithm for antenna avoidance/fixing on general routing trees with obstacles.Su, Bor-Yiing; Chang, Yao-Wen; Hu, Jiang; YAO-WEN CHANG Proceedings of the 2006 International Symposium on Physical Design, ISPD 2006, San Jose, California, USA, April 9-12, 200670
3442006IEEE standard 1500 compatible interconnect diagnosis for delay and crosstalk faults.Li, Katherine Shu-Min; Chang, Yao-Wen; Su, Chauchin; Lee, Chung-Len; Chen, Jwu E.; YAO-WEN CHANG Proceedings of the 2006 Conference on Asia South Pacific Design Automation: ASP-DAC 2006, Yokohama, Japan, January 24-27, 200600
3452005超大型?米積體電?無格線式全晶片繞線系統 (1/3) Gridless Full-Chip Routing for Very-Large Scale Nanometer ICs張耀文 
3462005Crosstalk- and Performance-Driven Multilevel Full-Chip RoutingHo, Tsung-Yi; Chang, Yao-Wen ; Chen, Sao-Jie ; Lee, Der-TsaiIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 
3472005SoC test scheduling using the B*-tree based floorplanning techniqueWuu, Jen-Yi; Chen, Tung-Chieh; Chang, Yao-Wen Asia and South Pacific Design Automation Conference, ASP-DAC 200500
3482005SoC test scheduling using the B*-tree based floorplanning techniqueWuu, J.-Y.; Chen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 13
3492005Placement with symmetry constraints for analog layout design using TCG-SLin, J.-M.; Wu, G.-M.; Chang, Y.-W.; Chuang, J.-H.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 37
3502005Modern floorplanning based on fast simulated annealingChen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 51
3512005An exact jumper insertion algorithm for antenna effect avoidance/fixingSu, B.-Y.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference10
3522005Multilevel full-chip gridless routing considering optical proximity correctionChen, T.-C.; Chang, Y.-W.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 19
3532005Reconfigurable platform for content science researchShih, Chi-Sheng; Yang, Chia-Lin; Ku, Mong-Kai; Kuo, Tei-Wei; Chien, Shao-Yi; Chang, Yao-Wen; Chen, Liang-Gee; LIANG-GEE CHEN ; Shih, Chi-Sheng ; Yang, Chia-Lin ; TEI-WEI KUO ; YAO-WEN CHANG ; SHAO-YI CHIEN ; Chang, Yao-Wen 11th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications 00
3542005多媒體通訊系統中可重組化運算技術之研究─子計畫五:可重組化系統之實體設計(3/3)張耀文 
3552005Multilevel routing with antenna avoidanceHo, Tsung-Yi; Chang, Yao-Wen ; Chen, Sao-JieBulletin of the College of Engineering 
3562005TCG: A transitive closure graph-based representation for general floorplansLin, J.-M.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Very Large Scale Integration (VLSI) Systems 4635
3572005Multilevel full-chip routing for the X-based architectureHo, T.-Y.; Chang, C.-F.; Chang, Y.-W.; Chen, S.-J.; YAO-WEN CHANG Design Automation Conference35
3582005NTUplace: A ratio partitioning based placement algorithm for large-scale mixed-size designsChen, T.-C.; Hsu, T.-C.; Jiang, Z.-W.; Chang, Y.-W.; YAO-WEN CHANG International Symposium on Physical Design 45
3592005Multilevel full-chip routing with testability and yield enhancementLi, K.S.-M.; Lee, C.-L.; Chang, Y.-W.; Su, C.; Chen, J.-E.; YAO-WEN CHANG International Workshop on System Level Interconnect Prediction, SLIP 2
3602005Rlc coupling-Aware simulation for on-chip buses and their encoding for delay reductionTu, S.-W.; Jou, J.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE International Symposium on Circuits and Systems 40
3612005A routing algorithm for flip-chip designFang, J.-W.; Lin, I.-J.; Yuh, P.-H.; Chang, Y.-W.; Wang, J.-H.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design350
3622005IMF: Interconnect-driven multilevel floorplanning for large-scale building-module designsChen, T.-C.; Chang, Y.-W.; Lin, S.-C.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design390
3632005Crosstalk- and performance-driven multilevel full-chip routingHo, T.-Y.; Chang, Y.-W.; Chen, S.-J.; Lee, D.-T.; YAO-WEN CHANG ; SAO-JIE CHEN IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 4733
3642005Delay modeling for buffered RLY/RLC treesWang, S.-L.; Chang, Y.-W.; YAO-WEN CHANG 2005 IEEE VLSI-TSA International Symposium on VLSI Design, Automation and Test100
3652005Multilevel full-chip routing for the X-based architectureHo, Tsung-Yi; Chang, Chen-Feng; Chang, Yao-Wen ; Chen, Sao-Jie Design Automation Conference 
3662005Multilevel full-chip routing with testability and yield enhancement.Li, Katherine Shu-Min; Lee, Chung-Len; Chang, Yao-Wen; Su, Chauchin; Chen, Jwu E.; YAO-WEN CHANG The Seventh International Workshop on System-Level Interconnect Prediction (SLIP 2005), San Francisco, CA, USA, April 2-3, 2005, Proceedings20
3672005Joint exploration of architectural and physical design spaces with thermal consideration.Wu, Yen-Wei; Yang, Chia-Lin; Yuh, Ping-Hung; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005, San Diego, California, USA, August 8-10, 2005160
3682005Multilevel full-chip gridless routing considering optical proximity correction.Chen, Tai-Chen; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005190
3692005Placement with symmetry constraints for analog layout design using TCG-S.Lin, Jai-Ming; Wu, Guang-Ming; Chang, Yao-Wen; Chuang, Jen-Hui; YAO-WEN CHANG Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005370
3702005NTUplace: a ratio partitioning based placement algorithm for large-scale mixed-size designs.Chen, Tung-Chieh; Hsu, Tien-Chang; Jiang, Zhe-Wei; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 200500
3712005Modern floorplanning based on fast simulated annealing.Chen, Tung-Chieh; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2005 International Symposium on Physical Design, ISPD 2005, San Francisco, California, USA, April 3-6, 2005510
3722005Multilevel full-chip routing for the X-based architecture.Ho, Tsung-Yi; Chang, Chen-Feng; Chang, Yao-Wen; Chen, Sao-Jie; YAO-WEN CHANG Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005350
3732005An exact jumper insertion algorithm for antenna effect avoidance/fixing.Su, Bor-Yiing; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005100
3742005SoC test scheduling using the B-tree based floorplanning technique.Wuu, Jen-Yi; Chen, Tung-Chieh; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2005 Conference on Asia South Pacific Design Automation, ASP-DAC 2005, Shanghai, China, January 18-21, 2005130
3752005TCG: A transitive closure graph based representation for general floorplansLin, Jai-Ming; Chang, Yao-Wen IEEE Transactions on 
3762004Temporal floorplanning using the T-tree formulationYuh, Ping-Hung; Yang, Chia-Lin ; Chang, Yao-Wen IEEE/ACM International Conference on Computer Aided Design, ICCAD-2004. 
3772004Area, Delay, Power, and Noise Optimization for Transmission Lines張耀文 
3782004Physical Design for Reconfigurable Computing System張耀文 
3792004MR: A New Framework for Multilevel Full-Chip RoutingChang, Yao-Wen ; Lin, Shih-PingIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 3933
3802004提升鈦合金超塑性成形及擴散接合技術研究(二)鄭榮和 ; 張耀文 ; 曾炳瑋
3812004Efficient power/ground network analysis for power integrity-driven design methodologyWu, S.-W.; Chang, Y.-W.; YAO-WEN CHANG Design Automation Conference20
3822004Universal switch blocks for three-dimensional FPGA designWu, G.-M.; Shyu, M.; Chang, Y.-W.; YAO-WEN CHANG IEE Proceedings: Circuits, Devices and Systems 74
3832004RLC effects on worst-case switching pattern for on-chip busesTu, S.-W.; Jou, J.-Y.; Chang, Y.-W.; YAO-WEN CHANG IEEE International Symposium on Circuits and Systems 10
3842004A reusable methodology for non-slicing floorplanningHsu, J.-M.; Chang, Y.-W.; YAO-WEN CHANG IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS 1
3852004Simultaneous Floorplan and Buffer-Block OptimizationJiang, Iris Hui-Ru; Chang, Yao-Wen ; Jou, Jing-Yang; Chao, Kai-YuanIEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 102
3862004A clustering- and probability-based approach for time-multiplexed FPGA partitioningWu, Guang-Ming; Chao, Mango Chia-Tso; Chang, Yao-Wen Integration 10
3872004TCG-S: Orthogonal Coupling of P^*-Admissible Representations for General FloorplansLin, Jai-Ming; Chang, Yao-Wen IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 
3882004Timing modeling and optimization under the transmission line modelChen, Tai-Chen; Pan, Song-Ra; Chang, Yao-Wen IEEE Transactions on 3227
3892004Temporal floorplanning using the T-tree formulationYuh, P.-H.; Yang, C.-L.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design59
3902004Temporal Floorplanning Using 3D-subTCGYuh, Ping-Hung; Yang, Chia-Lin ; Chang, Yao-Wen ; Chen, Hsin-LungAsia and South Pacific Design Automation Conference, ASP-DAC 
3912004Multilevel routing with jumper insertion for antenna avoidanceHo, Tsung-Yi; Chang, Yao-Wen ; Chen, Sao-Jie IEEE International SOC Conference 00
3922004TCG-S: Orthogonal coupling of P*-admissible representations for general floorplansLin, J.-M.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 4020
3932004Temporal floorplanning using 3D-subTCGYuh, P.-H.; Yang, C.-L.; Chang, Y.-W.; Chen, H.-L.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 40
3942004Temporal floorplanning using the T-tree formulation.Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; YAO-WEN CHANG 2004 International Conference on Computer-Aided Design, ICCAD 2004, San Jose, CA, USA, November 7-11, 200400
3952004Multilevel routing with antenna avoidance.Ho, Tsung-Yi; Chang, Yao-Wen; Chen, Sao-Jie; YAO-WEN CHANG Proceedings of the 2004 International Symposium on Physical Design, ISPD 2004, Phoenix, Arizona, USA, April 18-21, 2004350
3962004Efficient power/ground network analysis for power integrity-driven design methodology.Wu, Su-Wei; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 41th Design Automation Conference, DAC 2004, San Diego, CA, USA, June 7-11, 2004200
3972004Integrating buffer planning with floorplanning for simultaneous multi-objective optimization.Cheng, Yi-Hui; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 200400
3982004Layout techniques for on-chip interconnect inductance reduction.Tu, Shang-Wei; Jou, Jing-Yang; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 200400
3992004Temporal floorplanning using 3D-subTCG.Yuh, Ping-Hung; Yang, Chia-Lin; Chang, Yao-Wen; Chen, Hsin-Lung; YAO-WEN CHANG Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, Yokohama, Japan, January 27-30, 200400
4002004Placement with alignment and performance constraints using the B*-tree representationWu, M.-C.; Chang, Y.-W.; YAO-WEN CHANG IEEE International Conference on Computer Design: VLSI in Computers and Processors 140
4012004Multilevel routing with jumper insertion for antenna avoidanceHo, T.-Y.; Chang, Y.-W.; Chen, S.-J.; YAO-WEN CHANG IEEE International SOC Conference 1
4022004Integrating buffer planning with floorplanning for simultaneous multi-objective optimizationCheng, Y.-H.; Chang, Y.-W.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 8
4032004Multilevel routing with antenna avoidanceHo, T.-Y.; Chang, Y.-W.; Chen, S.-J.; YAO-WEN CHANG International Symposium on Physical Design 35
4042004Layout techniques for on-chip interconnect inductance reductionTu, S.-W.; Jou, J.-Y.; Chang, Y.-W.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 1
4052003Physical Design for Reconfigurable Computing System張耀文 
4062003Area, Delay, Power , and Noise Optimization for Transmission Lines張耀文 
4072003A fast crosstalk- and performance-driven multilevel routing systemHo, Tsung-Yi; Chang, Yao-Wen ; Chen, Sao-Jie ; Lee, D.T.IEEE/ACM International Conference on Computer-Aided Design00
4082003Inductance Modeling for On-Chip InterconnectsTu, Shang-Wei; Shen, Wen-Zen; Chang, Yao-Wen ; Chen, Tai-Chen; Jou, Jing-YangAnalog Integrated Circuits and Signal Processing 54
4092003Corner sequence: A P-admissible floorplan representation with a worst-case linear-time packing schemeLin, Jai-Ming; Chang, Yao-Wen ; Lin, Shih-PingIEEE Transactions on Very Large Scale Integration (VLSI) Systems3732
4102003Simultaneous floorplanning and buffer block planningHui-Ru Jiang, I.; Chang, Y.-W.; Jou, J.-Y.; Chao, K.-Y.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 100
4112003Noise-aware buffer planning for interconnect-driven floorplanningLi, S.-M.; Cherng, Y.-H.; Chang, Y.-W.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 60
4122003Multilevel floorplanning/placement for large-scale modules using B*-treesLee, H.-C.; Chang, Y.-W.; Hsu, J.-M.; Yang, H.H.; YAO-WEN CHANG Design Automation Conference24
4132003Analysis of FPGA/FPIC switch modulesChang, Y.-W.; Zhu, K.; Wu, G.-M.; Wong, D.F.; Wong, C.K.; Chang, Yao-Wen ACM Transactions on Design Automation of Electronic Systems 23
4142003A Fast Crosstalk- and Performance-Driven Multilevel Routing SystemHo, T.-Y.; Chang, Y.-W.; Chen, S.-J.; Lee, D.T.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design42
4152003Rectilinear block placement using B*-treesWu, G.-M.; Chang, Y.-C.; Chang, Y.-W.; YAO-WEN CHANG ACM Transactions on Design Automation of Electronic Systems 2520
4162003Graph matching-based algorithms for array-based FPGA segmentation design and routingLin, J.-M.; Pan, S.-R.; Chang, Y.-W.; YAO-WEN CHANG Asia and South Pacific Design Automation Conference, ASP-DAC 20
4172003Multilevel floorplanning/placement for large-scale modules using B*-trees.Lee, Hsun-Cheng; Chang, Yao-Wen; Hsu, Jer-Ming; Yang, Hannah Honghua; YAO-WEN CHANG Proceedings of the 40th Design Automation Conference, DAC 2003, Anaheim, CA, USA, June 2-6, 200300
4182003Graph matching-based algorithms for array-based FPGA segmentation design and routing.Lin, Jai-Ming; Pan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 200300
4192003Noise-aware buffer planning for interconnect-driven floorplanning.Li, Katherine Shu-Min; Cherng, Yih-Huai; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 200300
4202003Simultaneous floorplanning and buffer block planning.Jiang, Iris Hui-Ru; Chang, Yao-Wen; Jou, Jing-Yang; Chao, Kai-Yuan; YAO-WEN CHANG Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 200300
4212002Performance Optimization Under the Transmission Line Model張耀文 
4222002Formulae for performance optimization and their applications to interconnect-driven floorplanningChang, N.C.-Y.; Chang, Y.-W.; Jian, I.H.-R.; YAO-WEN CHANG International Symposium on Quality Electronic Design, ISQED 10
4232002Inductance modeling for on-chip interconnectsTu, S.-W.; Shen, W.-Z.; Chang, Y.-W.; Chen, T.-C.; YAO-WEN CHANG IEEE International Symposium on Circuits and Systems 2
4242002Performance-driven placement for dynamically reconfigurable FPGAsWu, G.-M.; Lin, J.-M.; Chang, Y.-W.; Wu, Guang-Ming; Lin, Jai-Ming; Chang, Yao-Wen; YAO-WEN CHANG ACM Transactions on Design Automation of Electronic Systems 00
4252002A novel framework for multilevel routing considering routability and performanceLin, S.-P.; Chang, Y.-W.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design520
4262002Arbitrary convex and concave rectilinear module packing using TCGLin, J.-M.; Chen, H.-L.; Chang, Y.-W.; YAO-WEN CHANG Design, Automation and Test in Europe, DATE 60
4272002Arbitrarily shaped rectilinear module placement using the transitive closure graph representationLin, J.-M.; Chen, H.-L.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Very Large Scale Integration (VLSI) Systems 88
4282002Comment on "generic universal switch blocks"Fan, H.; Wu, Y.-L.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computers 56
4292002Module placement with boundary constraints using B*-treesLin, J.-M.; Yi, H.-E.; Chang, Y.-W.; YAO-WEN CHANG IEE Proceedings: Circuits, Devices and Systems 1811
4302002Comment on "Generic universal switch blocks"Fan, Hongbing; Wu, Yu-Liang; Chang, Yao-Wen IEEE Transactions on Computers 
4312002Simultaneous Buffer-sizing and Wire-sizing for Clock Trees Based on Lagrangian RelaxationLEE, YU-MIN; CHEN, CHARLIE CHUNG-PING; CHANG, YAO-WEN ; WONG, D.F.VLSI Design 42
4322002TCG-S: orthogonal coupling of P*-admissible representations for general floorplans.Lin, Jai-Ming; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 39th Design Automation Conference, DAC 2002, New Orleans, LA, USA, June 10-14, 200200
4332002Inductance modeling for on-chip interconnectsTu, S.-W.; Shen, W.-Z.; Chang, Y.-W.; Chen, T.-C.; YAO-WEN CHANG Proceedings - IEEE International Symposium on Circuits and Systems20
4342001Performance optimization by wire and buffer sizing under the transmission line modelChen, Tai-Chen; Pan, Song-Ra; Chang, Yao-Wen 2001 International Conference on Computer Design30
4352001Matching-Based Algorithm for FPGA Channel Segmentation DesignChang, Yao-Wen ; Lin, Jai-Ming; Wong, M. D. F.IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 56
4362001Performance optimization by wire and buffer sizing under the transmission line modelChen, T.-C.; Pan, S.-R.; Chang, Y.-W.; YAO-WEN CHANG IEEE International Conference on Computer Design: VLSI in Computers and Processors 3
4372001Generic ILP-based approaches for time-multiplexed FPGA partitioningWu, G.-M.; Lin, J.-M.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 2921
4382001Generic ILP-based approaches for dynamically reconfigurable FPGA partitioningWu, G.-M.; Lin, J.-M.; Chao, M.C.-T.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors00
4392001An algorithm for dynamically reconfigurable FPGA placementWu, G.-M.; Lin, J.-M.; Chang, Y.-W.; YAO-WEN CHANG Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors60
4402001TCG: A Transitive Closure Graph-Based Representation for Non-Slicing Floorplans.Lin, Jai-Ming; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 38th Design Automation Conference, DAC 2001, Las Vegas, NV, USA, June 18-22, 200100
4412000Rectilinear block placement using B*-treesWu, Guang-Ming; Chang, Yun-Chih; Chang, Yao-Wen; YAO-WEN CHANG IEEE International Conference on Computer Design: VLSI in Computers and Processors 9
4422000Timing-driven routing for symmetrical-array-based FPGAsCHANG, YAO-WEN ; ZHU, KAI; WONG, D. F.ACM Transactions on Design Automation of Electronic Systems 
4432000Architecture-driven metric for simultaneous placement and global routing for FPGAsChang, Yao-Wen; Chang, Yu-Tsang; YAO-WEN CHANG Design Automation Conference10
4442000B<sup>*</sup>-trees: a new representation for non-slicing floorplansChang, Yun-Chih; Chang, Yao-Wen; Wu, Guang-Ming; Wu, Shu-Wei; YAO-WEN CHANG Design Automation Conference412
4452000Crosstalk-constrained performance optimization by using wire sizing and perturbationPan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG IEEE International Conference on Computer Design: VLSI in Computers and Processors 12
4462000Generic universal switch blocksShyu, M.; Wu, G.-M.; Chang, Y.-D.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computers 3128
4472000Optimal reliable crosstalk-driven interconnect optimizationJiang, Iris Hui-Ru; Pan, Song-Ra; Chang, Yao-Wen; Jou, Jing-Yang; YAO-WEN CHANG International Symposium on Physical Design 6
4482000Timing-driven routing for symmetrical array-based FPGAsChang, Y.-W.; Zhu, K.; Wong, D.F.; YAO-WEN CHANG ACM Transactions on Design Automation of Electronic Systems 2017
4492000Crosstalkdriven interconnect optimization by simultaneous gate and wire sizingJiang, I.H.R.; Chang, Y.W.; Jou, J.Y.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 10
4502000Crosstalk-driven interconnect optimization by simultaneous gate and wire sizingJiang, Iris Hui-Ru; Chang, Yao-Wen; Jou, Jing-Yang; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 4738
4512000B * -trees: A new representation for non-slicing floorplansChang, Y.-C.; Chang, Y.-W.; Wu, G.-M.; Wu, S.-W.; YAO-WEN CHANG Proceedings-Design Automation Conference4120
4522000Rectilinear Block Placement Using B*-Trees.Wu, Guang-Ming; Chang, Yun-Chih; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 200000
4532000Crosstalk-Constrained Performance Optimization by Using Wire Sizing and Perturbation.Pan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 200000
4542000B*-Trees: a new representation for non-slicing floorplans.Chang, Yun-Chih; Chang, Yao-Wen; Wu, Guang-Ming; Wu, Shu-Wei; YAO-WEN CHANG Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000.00
4552000An architecture-driven metric for simultaneous placement and global routing for FPGAs.Chang, Yao-Wen; Chang, Yu-Tsang; YAO-WEN CHANG Proceedings of the 37th Conference on Design Automation, Los Angeles, CA, USA, June 5-9, 2000.100
4562000Optimal reliable crosstalk-driven interconnect optimization.Jiang, Iris Hui-Ru; Pan, Song-Ra; Chang, Yao-Wen; Jou, Jing-Yang; YAO-WEN CHANG Proceedings of the 2000 International Symposium on Physical Design, ISPD 2000, San Diego, CA, USA, April 9-12, 200060
4571999Clustering- and probability-based approach for time-multiplexed FPGA partitioningChao, Mango Chia-Tso; Wu, Guang-Ming; Jiang, Iris Hui-Ru; Chang, Yao-Wen; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design17
4581999Quasi-universal switch matrices for FPD designWu, G.-M.; Chang, Y.-W.; YAO-WEN CHANG IEEE Transactions on Computers 63
4591999Generic Universal Switch Blocks.Shyu, Michael; Chang, Yu-Dong; Wu, Guang-Ming; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 199900
4601999A clustering- and probability-based approach for time-multiplexed FPGA partitioning.Chao, Mango Chia-Tso; Wu, Guang-Ming; Jiang, Iris Hui-Ru; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999, San Jose, California, USA, November 7-11, 199900
4611999Universal Switch Blocks for Three-Dimensional FPGA Design.Wu, Guang-Ming; Shyu, Michael; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 1999 ACM/SIGDA Seventh International Symposium on Field Programmable Gate Arrays, FPGA 1999, Monterey, CA, USA, February 21-23, 199900
4621999Generic universal switch blocksShyu, Michael; Chang, Yu-Dong; Wu, Guang-Ming; Chang, Yao-Wen; YAO-WEN CHANG IEEE International Conference on Computer Design: VLSI in Computers and Processors 1
4631999Noise-Constrained Performance Optimization by Simultaneous Gate and Wire Sizing Based on Lagrangian Relaxation.Jiang, Iris Hui-Ru; Jou, Jing-Yang; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 36th Conference on Design Automation, New Orleans, LA, USA, June 21-25, 1999.80
4641998Maximally routable switch matrices for FPD designWu, Guang-Min; Chang, Yao-Wen; YAO-WEN CHANG IEEE International Symposium on Circuits and Systems 0
4651998Switch-matrix architecture and routing for FPDsWu, Guang-Min; Chang, Yao-Wen; YAO-WEN CHANG International Symposium on Physical Design 2
4661998Graph matching-based algorithms for FPGA segmentation designChang, Yao-Wen; Lin, Jai-Ming; Wong, D.F.; YAO-WEN CHANG IEEE/ACM International Conference on Computer-Aided Design7
4671998Timing-driven routing for symmetrical-array-based FPGAsZhu, Kai; Chang, Yao-Wen; Wong, D.F.; YAO-WEN CHANG IEEE International Conference on Computer Design: VLSI in Computers and Processors 10
4681998Timing-driven routing for symmetrical-array-based FPGAs.Zhu, Kai; Chang, Yao-Wen; Wong, D. F.; YAO-WEN CHANG International Conference on Computer Design: VLSI in Computers and Processors, ICCD 1998, Proceedings, 5-7 October, 1998, Austin, TX, USA00
4691998Graph matching-based algorithms for FPGA segmentation design.Chang, Yao-Wen; Lin, Jai-Ming; Wong, D. F.; YAO-WEN CHANG Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1998, San Jose, CA, USA, November 8-12, 199870
4701998Switch-matrix architecture and routing for FPDs.Wu, Guang-Ming; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 1998 International Symposium on Physical Design, ISPD 1998, Monterey, CA, USA, April 6-8, 199820
4711997Algorithms for an FPGA switch module routing problem with application to global routingThakur, S.; Chang, Y.-W.; Wong, D.F.; Muthukrishnan, S.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 127
4721997Graph-theoretic sufficient condition for FPGA/FPIC switch-module routabilityChang, Yao-Wen; Wong, D.F.; Wong, C.K.; YAO-WEN CHANG IEEE International Symposium on Circuits and Systems 0
4731996Universal switch modules for fpga designChang, Y.-W.; Wong, D.F.; Wong, C.K.; YAO-WEN CHANG ACM Transactions on Design Automation of Electronic Systems 86
4741996Universal switch-module design for symmetric-array-based FPGAsChang, Yao-Wen; Wong, D.F.; Wong, C.K.; YAO-WEN CHANG ACM/SIGDA International Symposium on Field Programmable Gate Arrays - FPGA 20
4751996On a new timing-driven routing tree problemChang, Yao-Wen; Wong, D.F.; Zhu, Kai; Wong, C.K.; YAO-WEN CHANG IEEE International Symposium on Circuits and Systems 2
4761996Fast performance-driven optimization for buffered clock trees based on Lagrangian relaxationChen, Chung-Ping; Chang, Yao-Wen; Wong, D.F.; YAO-WEN CHANG Design Automation Conference23
4771996Fast Performance-Driven Optimization for Buffered Clock Trees Based on Lagrangian Relaxation.Chen, Chung-Ping; Chang, Yao-Wen; Wong, D. F.; YAO-WEN CHANG Proceedings of the 33st Conference on Design Automation, Las Vegas, Nevada, USA, Las Vegas Convention Center, June 3-7, 1996.230
4781996Universal Switch-Module Design for Symmetric-Array-Based FPGAs.Chang, Yao-Wen; Wong, D. F.; Wong, C. K.; YAO-WEN CHANG Proceedings of the 1996 Fourth International Symposium on Field Programmable Gate Arrays, FPGA 1996, Monterey, CA, USA, February 11-13, 1996200
4791996A velocity-overshoot capacitance model for 0.1 μm MOS transistorsKuo, J.B.; Chang, Y.W.; Lai, C.S.; YAO-WEN CHANG Solid-State Electronics44
4801995Design and analysis of FPGA/FPIC switch modulesChang, Yao-Wen; Wong, D.F.; Wong, C.K.; YAO-WEN CHANG IEEE International Conference on Computer Design: VLSI in Computers and Processors 5
4811995FPGA global routing based on a new congestion metricChang, Yao-Wen; Wong, D.F.; Wong, C.K.; YAO-WEN CHANG IEEE International Conference on Computer Design: VLSI in Computers and Processors 12
4821995Design and analysis of FPGA/FPIC switch modules.Chang, Yao-Wen; Wong, D. F.; Wong, C. K.; YAO-WEN CHANG 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings00
4831995FPGA global routing based on a new congestion metric.Chang, Yao-Wen; Wong, D. F.; Wong, C. K.; YAO-WEN CHANG 1995 International Conference on Computer Design (ICCD '95), VLSI in Computers and Processors, October 2-4, 1995, Austin, TX, USA, Proceedings00
4841994New global routing algorithm for FPGAsChang, Yao-Wen; Thakur, Shashidhar; Zhu, Kai; Wong, D.F.; YAO-WEN CHANG IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 12
4851994A new global routing algorithm for FPGAs.Chang, Yao-Wen; Thakur, Shashidhar; Zhu, Kai; Wong, D. F.; YAO-WEN CHANG Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 1994, San Jose, California, USA, November 6-10, 199400
4861993Switch module design with application to two-dimensional segmentation designZhu, Kai; Wong, D.F.; Chang, Yao-Wen; YAO-WEN CHANG 14
4871993Switch module design with application to two-dimensional segmentation design.Zhu, Kai; Wong, D. F.; Chang, Yao-Wen; YAO-WEN CHANG Proceedings of the 1993 IEEE/ACM International Conference on Computer-Aided Design, 1993, Santa Clara, California, USA, November 7-11, 199300