Projects
(Principal Investigator)



Results 1-18 of 18 (Search time: 0.004 seconds).

Start DateTitleP-InvestigatorFunding Organization/經費來源
2018下世代前瞻電子設計自動化技術-子計畫一:下世代前瞻驗證技術:設計知識萃取與語意分析CHUNG-YANG HUANGMinistry of Science and Technology
2018正規驗證引擎中之自動抽象化技術CHUNG-YANG HUANG
2017下世代前瞻電子設計自動化技術-子計畫一:下世代前瞻驗證技術:設計知識萃取與語意分析CHUNG-YANG HUANGMinistry of Science and Technology
2016考量次10奈米製程下可延展性與可靠性之系統晶片驗證技術CHUNG-YANG HUANGMinistry of Science and Technology
2016下世代前瞻電子設計自動化技術-子計畫一:下世代前瞻驗證技術:設計知識萃取與語意分析CHUNG-YANG HUANGMinistry of Science and Technology
2015考量次10奈米製程下可延展性與可靠性之系統晶片驗證技術CHUNG-YANG HUANGMinistry of Science and Technology
2014考量次10奈米製程下可延展性與可靠性之系統晶片驗證技術CHUNG-YANG HUANGMinistry of Science and Technology
2013針對次 14 奈米技術之設計驗證研究(I)CHUNG-YANG HUANGMinistry of Science and Technology
2012針對次22奈米技術之前瞻電子設計自動化研究-子計畫二:針對次22奈米技術之整合功能與實體工程修改命令研究CHUNG-YANG HUANGMinistry of Science and Technology
2012提升教學品質計畫-創意創業學程業務之推展CHUNG-YANG HUANGMinistry of Education
2011針對次22奈米技術之前瞻電子設計自動化研究-子計畫二:針對次22奈米技術之整合功能與實體工程修改命令研究CHUNG-YANG HUANGMinistry of Science and Technology
2010科學工業園區研發精進產學合作計畫—功能驗證完整性產品之研究與開發CHUNG-YANG HUANGHsinchu Science Park Bureau, MOST
2010針對次22奈米技術之前瞻電子設計自動化研究-子計畫二:針對次22奈米技術之整合功能與實體工程修改命令研究CHUNG-YANG HUANGMinistry of Science and Technology
2008iChip兆級智慧矽晶片之研究:演算法,架構,與實現技術-子計畫五:兆級智慧矽晶片自動學習模型產生器之研究CHUNG-YANG HUANGMinistry of Science and Technology
2007兆級晶片系統前瞻技術研究-子計畫七:兆級晶片系統模擬與正規驗證之整合技術(3/3)CHUNG-YANG HUANGMinistry of Science and Technology
2006兆級晶片系統前瞻技術研究-子計畫七:兆級晶片系統模擬與正規驗證之整合技術(2/3)CHUNG-YANG HUANGMinistry of Science and Technology
2006FSTA:正規靜態時序分析技術(II)CHUNG-YANG HUANGMinistry of Science and Technology
2005兆級晶片系統前瞻技術研究-子計畫七:兆級晶片系統模擬與正規驗證之整合技術(1/3)CHUNG-YANG HUANGMinistry of Science and Technology