第 1 到 129 筆結果,共 129 筆。

公開日期標題作者來源出版物scopusWOS全文
12023MultiFuse: Efficient Cross Layer Fusion for DNN Accelerators with Multi-level Memory HierarchyChang, Chia Wei; Liou, Jing Jia; Huang, Chih Tsun; WEI-CHUNG HSU ; Lu, Juin MingProceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors
22022Accelerating Video Captioning on Heterogeneous System ArchitecturesHuang, Horng Ruey; Hong, Ding Yong; Wu, Jan Jan; Chen, Kung Fu; PANGFENG LIU ; WEI-CHUNG HSU ACM Transactions on Architecture and Code Optimization11
32021Efficient video captioning on heterogeneous system architecturesHuang H.-R; Hong D.-Y; Wu J.-J; PANGFENG LIU ; WEI-CHUNG HSU Proceedings - 2021 IEEE 35th International Parallel and Distributed Processing Symposium, IPDPS 202130
42021Intra- And Inter- Layer Transformation to Reduce Memory Traffic for CNN ComputationLiao P.-W; WEI-CHUNG HSU ; SHIH-WEI LIAO ACM International Conference Proceeding Series10
52019Processor-tracing guided region formation in dynamic binary translationHong, D.-Y.; Wu, J.-J.; Liu, Y.-P.; Fu, S.-Y.; Hsu, W.-C.; WEI-CHUNG HSU ACM Transactions on Architecture and Code Optimization10
62019Optimizing data permutations in structured loads/stores translation and SIMD register mapping for a cross-ISA dynamic binary translatorFu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU Journal of Systems Architecture00
72019Enhancing Transactional Memory Execution via Dynamic Binary TranslationHong, Ding-Yong; Lin, Shih-Kai; Fu, Sheng-Yu; Wu, Jan-Jan; WEI-CHUNG HSU Applied Computing Review00
82019Translating Traditional SIMD Instructions to Vector Length Agnostic Architectures.Fu, Sheng-Yu; Hsu, Wei-Chung; WEI-CHUNG HSU IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2019, Washington, DC, USA, February 16-20, 201900
92019Exploiting SIMD asymmetry in Arm-to-X86 dynamic binary translationLiu, Y.-P.; Hong, D.-Y.; Wu, J.-J.; Fu, S.-Y.; Hsu, W.-C.; WEI-CHUNG HSU ACM Transactions on Architecture and Code Optimization43
102019Efficient Dynamic Device Placement for Deep Neural Network Training on Heterogeneous Systems.Huang, Zi Xuan; Fu, Shen Yu; Hsu, Wei-Chung; WEI-CHUNG HSU Embedded Computer Systems: Architectures, Modeling, and Simulation - 19th International Conference, SAMOS 2019, Samos, Greece, July 7-11, 2019, Proceedings20
112018Improving SIMD parallelism via dynamic binary translationHong, D.-Y.; Liu, Y.-P.; Fu, S.-Y.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU ACM Transactions on Embedded Computing Systems1010
122018Work-in-Progress: Exploiting SIMD Capability in an ARMv7-to-ARMv8 Dynamic Binary TranslatorFu, S.-Y.; Lin, C.-M.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU 2018 International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 201800
132018Efficient synthetic light field generation using adaptive multi-level renderingTseng, L.-C.; WEI-CHUNG HSU Proceedings of the 2018 Research in Adaptive and Convergent Systems, RACS 201800
142018Efficient and retargetable SIMD translation in a dynamic binary translatorFu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU Software - Practice and Experience44
152018Exploring hidden coherency of Ray-Tracing for heterogeneous systems using online feedback methodologyKao, C.-C.; Hsu, W.-C.; WEI-CHUNG HSU Visual Computer22
162018Exploiting SIMD capability in an ARMv7-to-ARMv8 dynamic binary translator.Fu, Sheng-Yu; Lin, Chih-Min; Hong, Ding-Yong; Liu, Yu-Ping; Wu, Jan-Jan; Hsu, Wei-Chung; WEI-CHUNG HSU Proceedings of the International Conference on Compilers, Architecture and Synthesis for Embedded Systems, CASES 2018, Torino, Italy, September 30 - October 05, 2018
172018Adaptive runtime exploiting sparsity in tensor of deep learning neural network on heterogeneous systemsPeng, K.-Y.; Fu, S.-Y.; Liu, Y.-P.; WEI-CHUNG HSU Proceedings - 2017 17th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, SAMOS 2017100
182018A Pipeline-Based Heterogeneous Framework for Efficient Synthetic Light Field RenderingKao, Chih-Chen; Tseng, Liang-Chi; Hsu, Wei-Chung; WEI-CHUNG HSU Applied Computing Review10
192018Automatically migrating sequential applications to heterogeneous system architectureLiang, C.-Y.; Fu, S.-Y.; Liu, Y.-P.; WEI-CHUNG HSU Proceedings - 2018 International Conference on High Performance Computing and Simulation, HPCS 201800
202017Efficient Synthetic Light Field Rendering on Heterogeneous Systems Using a Pipeline-Based Runtime Design.Kao, Chih-Chen; Tseng, Liang-Chi; Hsu, Wei-Chung; WEI-CHUNG HSU Proceedings of the International Conference on Research in Adaptive and Convergent Systems, RACS 2017, Krakow, Poland, September 20-23, 201710
212017Dynamic translation of structured loads/stores and register mapping for architectures with SIMD extensionsFu, S.-Y.; Hong, D.-Y.; Liu, Y.-P.; Wu, J.-J.; WEI-CHUNG HSU Proceedings of the ACM SIGPLAN Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES)40
222017Exploiting longer SIMD lanes in dynamic binary translationHong, D.-Y.; Fu, S.-Y.; Liu, Y.-P.; Wu, J.-J.; WEI-CHUNG HSU Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS70
232017Exploiting Asymmetric SIMD Register Configurations in ARM-to-x86 Dynamic Binary TranslationLiu, Y.-P.; Hong, D.-Y.; Wu, J.-J.; Fu, S.-Y.; WEI-CHUNG HSU Parallel Architectures and Compilation Techniques - Conference Proceedings, PACT70
242017A Pipeline-Based Ray-Tracing Runtime System for HSA-Compliant FrameworksKao, Chih-Chen; Miao, Yu-Tsung; Hsu, Wei-Chung; WEI-CHUNG HSU Ieee Transactions on Multimedia11
252017On static binary translation of ARM/Thumb Mixed ISA binariesChen, J.-Y.; Yang, W.; Hsu, W.-C.; Shen, B.-Y.; WEI-CHUNG HSU ACM Transactions on Embedded Computing Systems44
262016A pipeline-based runtime technique for improving Ray-Tracing on HSA-compliant systemsKao, C.-C.; Miao, Y.-T.; WEI-CHUNG HSU Proceedings - IEEE International Conference on Multimedia and Expo30
272016Building a KVM-based Hypervisor for a Heterogeneous System Architecture Compliant System.Huang, Yu-Ju; Wu, Hsuan-Heng; Chung, Yeh-Ching; WEI-CHUNG HSU Proceedings of the 12th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, Atlanta, GA, USA, April 2-3, 201680
282016HSA SimulatorsChung, Y.-C.; Hsu, W.-C. ; Hung, S.-H. ; Jablin, T.B.; Kaeli, D.; Sun, Y.; Ubal, R.Heterogeneous System Architecture: A New Compute Platform Infrastructure20
292016Building a KVM-based Hypervisor for a Heterogeneous System Architecture Compliant SystemHuang, Yu-Ju; Wu, Hsuan-Heng; Chung, Yeh-Ching; Hsu, Wei-Chung; WEI-CHUNG HSU Acm Sigplan Notices80
302016SIMD code translation in an enhanced HQEMUFu, S.-Y.; Hong, D.-Y.; Wu, J.-J.; Liu, P.; WEI-CHUNG HSU ; PANGFENG LIU International Conference on Parallel and Distributed Systems80
312016Message from the general chairsHsu, W.C.; CHIA-LIN YANG ; WEI-CHUNG HSU Proceedings of the Annual International Symposium on Microarchitecture, MICRO00
322016HSAemu 2.0: Full system emulation for HSA platforms with Soft-MMUHsu, H.-C.; Yeh, C.-W.; Hung, S.-H.; Hsu, W.-C.; King, C.-T.; SHIH-HAO HUNG ; WEI-CHUNG HSU Proceedings of the 2016 Research in Adaptive and Convergent Systems, RACS 201610
332015HSPT: Practical Implementation and Efficient Management of Embedded Shadow Page Tables for Cross-ISA System Virtual Machines.Wang, Zhe; Li, Jianjun; Wu, Chenggang; Yang, Dongyan; Wang, Zhenjiang; Hsu, Wei-Chung; Li, Bin; WEI-CHUNG HSU Proceedings of the 11th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, Istanbul, Turkey, March 14-15, 201530
342015Improving SIMD code generation in QEMUFu, S.-Y.; Wu, J.-J.; Hsu, W.-C.; WEI-CHUNG HSU Design, Automation and Test in Europe
352015Runtime techniques for efficient Ray-Tracing on heterogeneous systems.Kao, Chih-Chen; WEI-CHUNG HSU 2015 IEEE International Conference on Digital Signal Processing, DSP 2015, Singapore, July 21-24, 201540
362015A dynamic binary translation system in a client/server environmentHsu, C.-C.; Hong, D.-Y.; Hsu, W.-C.; Liu, P.; WEI-CHUNG HSU ; PANGFENG LIU Journal of Systems Architecture74
372015Automatic validation for binary translationChen, J.-Y.; Yang, W.; Shen, B.-Y.; Li, Y.-J.; WEI-CHUNG HSU Computer Languages, Systems and Structures64
382015Optimizing control transfer and memory virtualization in full system emulatorsHong, D.-Y.; Hsu, C.-C.; Chou, C.-Y.; Hsu, W.-C.; Liu, P.; WEI-CHUNG HSU ; PANGFENG LIU ACM Transactions on Architecture and Code Optimization52
392015An adaptive heterogeneous runtime framework for irregular applicationsKao, C.-C.; Hsu, W.-C.; WEI-CHUNG HSU Journal of Signal Processing Systems22
402014An adaptive heterogeneous runtime for irregular applications in the case of ray-tracing (extended abstract)Kao, C.-C.; Hsu, W.-C.; WEI-CHUNG HSU Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)00
412014An Adaptive Heterogeneous Runtime for Irregular Applications in the Case of Ray-Tracing (Extended Abstract).Kao, Chih-Chen; Hsu, Wei-Chung; WEI-CHUNG HSU Network and Parallel Computing - 11th IFIP WG 10.3 International Conference, NPC 2014, Ilan, Taiwan, September 18-20, 2014. Proceedings00
422014Efficient memory virtualization for Cross-ISA system mode emulation.Chang, Chao-Rui; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; WEI-CHUNG HSU ; PANGFENG LIU 10th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, VEE '14, Salt Lake City, UT, USA, March 01 - 02, 2014200
432014DBILL: an efficient and retargetable dynamic binary instrumentation framework using llvm backend.Lyu, Yi-Hong; Hong, Ding-Yong; Wu, Tai-Yi; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; WEI-CHUNG HSU ; PANGFENG LIU 10th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments, VEE '14, Salt Lake City, UT, USA, March 01 - 02, 2014140
442014A retargetable static binary translator for the ARM architectureShen, B.-Y.; Hsu, W.-C.; Yang, W.; WEI-CHUNG HSU Transactions on Architecture and Code Optimization1914
452014Efficient and retargetable dynamic binary translation on multicoresHong, D.-Y.; Wu, J.-J.; Yew, P.-C.; Hsu, W.-C.; Hsu, C.-C.; Liu, P.; Wang, C.-M.; WEI-CHUNG HSU ; PANGFENG LIU IEEE Transactions on Parallel and Distributed Systems97
462014Extended instruction exploration for multiple-issue architecturesWu, I.-W.; Shann, J.J.-J.; Hsu, W.-C.; Chung, C.-P.; WEI-CHUNG HSU ACM Transactions on Embedded Computing Systems11
472014Author retrospective for code scheduling and register allocation in large basic blocks.Goodman, James R.; WEI-CHUNG HSU ACM International Conference on Supercomputing 25th Anniversary Volume00
482014Dynamic and adaptive calling context encodingLi, J.; Wang, Z.; Wu, C.; Hsu, W.-C.; Xu, D.; WEI-CHUNG HSU 12th ACM/IEEE International Symposium on Code Generation and Optimization, CGO 201450
492014Code scheduling and register allocation in large basic blocksGoodman, J.R.; Hsu, W.-C.; WEI-CHUNG HSU International Conference on Supercomputing30
502013The design and implementation of heterogeneous multicore systems for energy-efficient speculative thread executionLuo, Y.; Hsu, W.-C.; Zhai, A.; WEI-CHUNG HSU Transactions on Architecture and Code Optimization41
512013Improving dynamic binary optimization through early-exit guided code region formation.Hsu, Chun-Chen; Liu, Pangfeng; Wu, Jan-Jan; Yew, Pen-Chung; Hong, Ding-Yong; Hsu, Wei-Chung; PANGFENG LIU ; WEI-CHUNG HSU ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments (co-located with ASPLOS 2013), VEE '13, Houston, TX, USA, March 16-17, 2013110
522013Improving Dynamic Binary Optimization Through Early-Exit Guided Code Region FormationHsu, Chun-Chen; Liu, Pangfeng; Wu, Jan-Jan; Yew, Pen-Chung; Hong, Ding-Yong; Hsu, Wei-Chung; WEI-CHUNG HSU ; PANGFENG LIU Acm Sigplan Notices17
532013Long-term follow-up results in patients with classic infantile Pompe disease receiving enzyme therapy since newbornChien, Yin-Hsiu; Hwu, Wuh-Liang; Lee, Ni-Chung; Chen, Chun-An; Tsai, Fuu-Jen; Tsai, Wen-Hui; Huang, Hsiang-Ju; Hsu, Wei-Chung; Tsai, Tzu-Hsun; Shieh, Jeng-Yi; WEI-CHUNG HSU Molecular Genetics and Metabolism00
542013Effective code discovery for ARM/Thumb mixed ISA binaries in a static binary translatorChen, J.-Y.; Shen, B.-Y.; Ou, Q.-H.; Yang, W.; WEI-CHUNG HSU 2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems110
552012A hybrid just-in-time compiler for android: Comparing JIT types and the result of cooperationP\\'erez, G.A.; Kao, C.-M.; Chung, Y.-C.; WEI-CHUNG HSU 2012 ACM International Conference on Compilers, Architectures and Synthesis for Embedded Systems60
562012Design of communication interface and control system for intelligent humanoid robot.Lin, Hsiung-Cheng; Chen, Chao-Hung; Huang, Guo-Shing; Liu, Ying-Chu; Hsu, Wei-Chung; WEI-CHUNG HSU Comp. Applic. in Engineering Education42
572012HQEMU: a multi-threaded and retargetable dynamic binary translator on multicores.Hong, Ding-Yong; Hsu, Chun-Chen; Yew, Pen-Chung; Wu, Jan-Jan; Hsu, Wei-Chung; Liu, Pangfeng; Wang, Chien-Min; WEI-CHUNG HSU ; PANGFENG LIU 10th Annual IEEE/ACM International Symposium on Code Generation and Optimization, CGO 2012, San Jose, CA, USA, March 31 - April 04, 2012930
582012LLBT: An LLVM-based static binary translatorShen, B.-Y.; Chen, J.-Y.; Hsu, W.-C.; WEI-CHUNG HSU 2012 ACM International Conference on Compilers, Architectures and Synthesis for Embedded Systems310
592012An LLVM-based hybrid binary translation systemShen, B.-Y.; You, J.-Y.; Yang, W.; WEI-CHUNG HSU 7th IEEE International Symposium on Industrial Embedded Systems140
602011LnQ: Building high performance dynamic binary translators with existing compiler backendsHsu, C.-C.; Liu, P.; Wang, C.-M.; Wu, J.-J.; Hong, D.-Y.; Yew, P.-C.; WEI-CHUNG HSU ; PANGFENG LIU International Conference on Parallel Processing130
612011PQEMU: A parallel system emulator based on QEMUDing, J.-H.; Chang, P.-C.; Hsu, W.-C.; WEI-CHUNG HSU International Conference on Parallel and Distributed Systems380
622011Efficient and effective misaligned data access handling in a dynamic binary translation systemLi, J.; Wu, C.; Hsu, W.-C.; WEI-CHUNG HSU Transactions on Architecture and Code Optimization00
632011Dynamic register promotion of stack variables.Li, Jianjun; Wu, Chenggang; WEI-CHUNG HSU Proceedings of the CGO 2011, The 9th International Symposium on Code Generation and Optimization, Chamonix, France, April 2-6, 201160
642011A method-based ahead-of-time compiler for android applicationsWang, C.-S.; Hsu, W.-C.; Perez, G.A.; Shih, W.-K.; Chung, Y.-C.; WEI-CHUNG HSU 14th International Conference on Compilers, Architectures and Synthesis for Embedded Systems160
652010Performance characterization of data mining benchmarksMekkat, V.; Natarajan, R.; Zhai, A.; WEI-CHUNG HSU Proceedings - Annual Workshop on Interaction between Compilers and Computer Architectures, INTERACT40
662010A lock-free cache-friendly software queue buffer for decoupled software pipeliningChen, W.R.; Yang, W.; Hsu, W.C.; WEI-CHUNG HSU International Computer Symposium20
672010Energy efficient speculative threads: Dynamic thread allocation in same-ISA heterogeneous multicore systemsLuo, Y.; Packirisamy, V.; Hsu, W.-C.; WEI-CHUNG HSU Parallel Architectures and Compilation Techniques190
682010Local-loop based robot action control module using independent microprocessors.Chen, Chao-Hung; Lin, Hsiung-Cheng; Liu, Ying-Chu; Hsu, Wei-Chung; WEI-CHUNG HSU Comp. Applic. in Engineering Education104
692009Dynamic performance tuning for speculative threads.Luo, Yangchun; Packirisamy, Venkatesan; Hsu, Wei-Chung; Zhai, Antonia; Mungre, Nikhil; WEI-CHUNG HSU 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA260
702009Comparison of surgery or radiotherapy on complications and quality of life in patients with the stage IB and IIA uterine cervical cancerHsu, Wei-Chung; Chung, Na-Na; Chen, Yu-Chia; Ting, Lai-Lei; Wang, Po-Ming; Hsieh, Pao-Chun; Chan, Shu-Ching; WEI-CHUNG HSU Gynecologic Oncology5448
712009An Evaluation of Misaligned Data Access Handling Mechanisms in Dynamic Binary Translation Systems.Li, Jianjun; Wu, Chenggang; WEI-CHUNG HSU Proceedings of the CGO 2009, The Seventh International Symposium on Code Generation and Optimization, Seattle, Washington, USA, March 22-25, 200940
722009Reducing code size by graph coloring register allocation and assignment algorithm for mixed-width ISA processorWang, J.-S.; Wu, I-W.; Chen, Y.-S.; Shann, J.J.-J.; WEI-CHUNG HSU 12th IEEE International Conference on Computational Science and Engineering00
732008The EXIT (ex utero intrapartum treatment) procedureChiu, Hsin-Hui; JIN-CHUNG SHIH ; PO-NIEN TSAO ; WU-SHIUN HSIEH ; HUNG-CHIEH CHOU ; WEI-CHUNG HSU Journal of the Formosan Medical Association1310
742008Sufficient sunlight supply for home care using local closed-loop shutter control system.Chen, Chao-Hung; Lin, Hsiung-Cheng; Liu, Ying-Chu; Hsu, Wei-Chung; Chang, Shin-Ming; WEI-CHUNG HSU Proceedings of the IEEE International Conference on Systems, Man and Cybernetics, Singapore, 12-15 October 200830
752007Entropy-Based Profile Characterization and Classification for Automatic Profile Management.Kim, Jinpyo; Hsu, Wei-Chung; Yew, Pen-Chung; Nair, Sreekumar R.; Geva, Robert Y.; WEI-CHUNG HSU Advances in Computer Systems Architecture, 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings00
762007An Architecture for the Interoperability of Multimedia Messaging Services between GPRS and PHS Cellular Networks.Hsieh, Wen-Chuan; Hsu, Wei-Chung; Hsu, Yu-Yuan; WEI-CHUNG HSU 3rd International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2007), Kaohsiung, Taiwan, 26-28 November 2007, Proceedings00
772007COBRA: An Adaptive Runtime Binary Optimization Framework for Multithreaded Applications.Kim, Jinpyo; Hsu, Wei-Chung; WEI-CHUNG HSU 2007 International Conference on Parallel Processing (ICPP 2007), September 10-14, 2007, Xi-An, China80
782007Entropy-based profile characterization and classification for automatic profile managementKim, J.; Hsu, W.-C.; Yew, P.-C.; Nair, S.R.; Geva, R.Y.; WEI-CHUNG HSU Lecture Notes in Computer Science
792007CIM: A Reliable Metric for Evaluating Program Phase Classifications.Kodakara, Sreekumar V.; Kim, Jinpyo; Lilja, David J.; Hawkins, Douglas M.; Hsu, Wei-Chung; Yew, Pen-Chung; WEI-CHUNG HSU Computer Architecture Letters50
802007Analysis of Statistical Sampling in Microarchitecture Simulation: Metric, Methodology and Program Characterization.Kodakara, Sreekumar V.; Kim, Jinpyo; Lilja, David J.; Hsu, Wei-Chung; WEI-CHUNG HSU IEEE 10th International Symposium on Workload Characterization, IISWC 2007, Boston, MA, USA, 27-29 September, 200710
812006A study of the performance potential for dynamic instruction hints selectionFu, R.; Lu, J.; Zhai, A.; Hsu, W.-C.; WEI-CHUNG HSU Lecture Notes in Computer Science
822006Supporting Speculative Multithreading on Simultaneous Multithreaded Processors.Packirisamy, Venkatesan; Wang, Shengyue; Zhai, Antonia; Hsu, Wei-Chung; Yew, Pen-Chung; WEI-CHUNG HSU High Performance Computing - HiPC 2006, 13th International Conference, Bangalore, India, December 18-21, 2006, Proceedings100
832006Recovery code generation for general speculative optimizations.Lin, Jin; Hsu, Wei-Chung; Yew, Pen-Chung; Ju, Roy Dz-Ching; Ngai, Tin-Fook; WEI-CHUNG HSU TACO20
842006A Study of the Performance Potential for Dynamic Instruction Hints Selection.Fu, Rao; Lu, Jiwei; Zhai, Antonia; Hsu, Wei-Chung; WEI-CHUNG HSU Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, ACSAC 2006, Shanghai, China, September 6-8, 2006, Proceedings10
852006Issues and support for dynamic register allocationDas, A.; Fu, R.; Zhai, A.; WEI-CHUNG HSU Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)1
862006Region monitoring for local phase detection in dynamic optimization systemsDas, A.; Lu, J.; WEI-CHUNG HSU The 4th International Symposium on Code Generation and Optimization60
872005Dynamic Code Region (DCR) based program phase tracking and prediction for dynamic optimizationsKim, J.; Kodakara, S.V.; Hsu, W.-C.; Lilja, D.J.; Yew, P.-C.; WEI-CHUNG HSU Lecture Notes in Computer Science
882005An empirical study on the granularity of pointer analysis in C programsChen, T.; Lin, J.; Hsu, W.-C.; Yew, P.-C.; WEI-CHUNG HSU Lecture Notes in Computer Science
892005Performance of runtime optimization on BLASTDas, A.; Lu, J.; Chen, H.; Kim, J.; Yew, P.-C.; Hsu, W.-C.; WEI-CHUNG HSU 2005 International Symposium on Code Generation and Optimization60
902005A general compiler framework for speculative optimizations using data speculative code motionDai, X.; Zhai, A.; Hsu, W.-C.; Yew, P.-C.; WEI-CHUNG HSU 2005 International Symposium on Code Generation and Optimization, CGO 2005
912005A General Compiler Framework for Speculative Optimizations Using Data Speculative Code Motion.Dai, Xiaoru; Zhai, Antonia; Hsu, Wei-Chung; Yew, Pen-Chung; WEI-CHUNG HSU 3nd IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2005), 20-23 March 2005, San Jose, CA, USA00
922005Dynamic Helper Threaded Prefetching on the Sun UltraSPARC CMP Processor.Lu, Jiwei; Das, Abhinav; Hsu, Wei-Chung; Nguyen, Khoa; WEI-CHUNG HSU 38th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-38 2005), 12-16 November 2005, Barcelona, Spain820
932005Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic Optimizations.Kim, Jinpyo; Kodakara, Sreekumar V.; Hsu, Wei-Chung; Lilja, David J.; Yew, Pen-Chung; WEI-CHUNG HSU High Performance Embedded Architectures and Compilers, First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings60
942004Continuous adaptive object-code re-optimization frameworkChen, H.; Lu, J.; Yew, P.-C.; WEI-CHUNG HSU Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)160
952004Design and implementation of a lightweight dynamic optimization systemLu, J.; Chen, H.; Yew, P.-C.; Hsu, W.-C.; WEI-CHUNG HSU Journal of Instruction-Level Parallelism
962004Data Dependence Profiling for Speculative Optimizations.Chen, Tong; Lin, Jin; Dai, Xiaoru; Hsu, Wei-Chung; Yew, Pen-Chung; WEI-CHUNG HSU Compiler Construction, 13th International Conference, CC 2004, Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2004, Barcelona, Spain, March 29 - April 2, 2004, Proceedings390
972004Data dependence profiling for speculative optimizationsChen, T.; Lin, J.; Dai, X.; Hsu, W.-C.; Yew, P.-C.; WEI-CHUNG HSU Lecture Notes in Computer Science
982004A compiler framework for speculative optimizations.Lin, Jin; Chen, Tong; Hsu, Wei-Chung; Yew, Pen-Chung; Ju, Roy Dz-Ching; Ngai, Tin-Fook; Chan, Sun; WEI-CHUNG HSU TACO110
992004A compiler framework for recovery code generation in general speculative optimizationsLin, J.; Hsu, W.-C.; Yew, P.-C.; Ju, R.D.-C.; Ngai, T.-F.; WEI-CHUNG HSU Parallel Architectures and Compilation Techniques
1002004A Compiler Framework for Recovery Code Generation in General Speculative Optimizations.Lin, Jin; Hsu, Wei-Chung; Yew, Pen-Chung; Ju, Roy Dz-Ching; Ngai, Tin-Fook; WEI-CHUNG HSU 13th International Conference on Parallel Architectures and Compilation Techniques (PACT 2004), 29 September - 3 October 2004, Antibes Juan-les-Pins, France00
1012003A compiler framework for speculative analysis and optimizationsLin, J.; Chen, T.; Hsu, W.-C.; Yew, P.-C.; Ju, R.D.-C.; Ngai, T.-F.; Chan, S.; WEI-CHUNG HSU ACM SIGPLAN Notices
1022003A compiler framework for speculative analysis and optimizations.Lin, Jin; Chen, Tong; Hsu, Wei-Chung; Yew, Pen-Chung; Ju, Roy Dz-Ching; Ngai, Tin-Fook; Chan, Sun; WEI-CHUNG HSU Proceedings of the ACM SIGPLAN 2003 Conference on Programming Language Design and Implementation 2003, San Diego, California, USA, June 9-11, 200300
1032003Dynamic Trace Selection Using Performance Monitoring Hardware Sampling.Chen, Howard; Hsu, Wei-Chung; Chen, Dong-yuan; WEI-CHUNG HSU 1st IEEE / ACM International Symposium on Code Generation and Optimization (CGO 2003), 23-26 March 2003, San Francisco, CA, USA00
1042003The performance of runtime data cache prefetching in a dynamic optimization systemLu, J.; Chen, H.; Fu, R.; Hsu, W.-C.; Othmer, B.; Yew, P.-C.; WEI-CHUNG HSU Annual International Symposium on Microarchitecture610
1052003Speculative register promotion using advanced load address table (ALAT)Lin, J.; Chen, T.; Hsu, W.-C.; WEI-CHUNG HSU International Symposium on Code Generation and Optimization280
1062002On the impact of naming methods for heap-oriented pointers in C programsChen, T.; Lin, J.; Hsu, W.-C.; WEI-CHUNG HSU International Symposium on Parallel Architectures, Algorithms and Networks20
1072002An Empirical Study on the Granularity of Pointer Analysis in C Programs.Chen, Tong; Lin, Jin; Hsu, Wei-Chung; Yew, Pen-Chung; WEI-CHUNG HSU Languages and Compilers for Parallel Computing, 15th Workshop, LCPC 2002, College Park, MD, USA, July 25-27, 2002, Revised Papers32
1082002On the Predictability of Program Behavior Using Different Input Data Sets.Hsu, Wei-Chung; Chen, Howard; Yew, Pen-Chung; Chen, Dong-yuan; WEI-CHUNG HSU 6th Annual Workshop on Interaction between Compilers and Computer Architecture (INTERACT-6 2002), 3 February 2002, Boston, MA, USA260
1091998A performance study of instruction cache prefetching methodsHsu, W.-C.; Smith, J.E.; WEI-CHUNG HSU IEEE Transactions on Computers1713
1101997Data Prefetching on the HP PA-8000.Santhanam, Vatsa; Gornish, Edward H.; Hsu, Wei-Chung; WEI-CHUNG HSU Proceedings of the 24th International Symposium on Computer Architecture, Denver, Colorado, USA, June 2-4, 1997380
1111997Data prefetching on the HP PA-8000Santhanam, Vatsa; Gornish, Edward H.; Hsu, Wei-Chung; WEI-CHUNG HSU Annual International Symposium on Computer Architecture
1121996Instruction Scheduling for the HP PA-8000.Dunn, David A.; Hsu, Wei-Chung; WEI-CHUNG HSU Proceedings of the 29th Annual IEEE/ACM International Symposium on Microarchitecture, MICRO 29, Paris, France, December 2-4, 199600
1131996Instruction scheduling for the HP PA-8000Dunn, David A.; Hsu, Wei-Chung; WEI-CHUNG HSU Annual International Symposium on Microarchitecture
1141993Performance of cached DRAM organizations in vector supercomputersHsu, W.-C.; Smith, J.E.; WEI-CHUNG HSU Annual Symposium on Computer Architecture
1151993Toward Effective Scalar Hardware for Highly Vectorizable ApplicationsVajapeyam, S.; Hsu, W.C.; WEI-CHUNG HSU Journal of Parallel and Distributed Computing00
1161993Performance of Cached DRAM Organizations in Vector Supercomputers.Hsu, Wei-Chung; Smith, James E.; WEI-CHUNG HSU Proceedings of the 20th Annual International Symposium on Computer Architecture, San Diego, CA, USA, May 1993260
1171992On the instruction-level characteristics of scalar code in highly-vectorized scientific applicationsVajapeyam, Sriram; WEI-CHUNG HSU 25th Annual International Symposium on Microarchitecture10
1181992Prefetching in Supercomputer Instruction Caches.Smith, James E.; Hsu, Wei-Chung; WEI-CHUNG HSU Proceedings Supercomputing '92, Minneapolis, MN, USA, November 16-20, 1992250
1191991An empirical study of the CRAY Y-MP processor using the PERFECT club benchmarksVajapeyam, Sriram; Sohi, Gurindar S.; WEI-CHUNG HSU Conference Proceedings - Annual Symposium on Computer Architecture70
1201990Future general purpose supercomputer architecturesSmith, J.E.; Hsu, W.-C.; Hsiung, C.; WEI-CHUNG HSU 
1211990The use of intermediate memories for low-latency memory access in supercomputer scalar unitsSohi, G.S.; Hsu, W.-C.; WEI-CHUNG HSU The Journal of Supercomputing00
1221990Exploitation of operation-level parallelism in a processor of the CRAY X-MP.Vajapeyam, Sriram; Sohi, Gurindar S.; Hsu, Wei-Chung; WEI-CHUNG HSU Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, ICCD 1990, Cambridge, MA, USA, 17-19 September, 199000
1231990Exploitation of operation-level parallelism in a processor of the CRAY X-MPVajapeyam, Sriram; Sohi, Gurindar S.; Hsu, Wei-Chung; WEI-CHUNG HSU IEEE International Conference on Computer Design: VLSI in Computers and Processors
1241990Future general purpose supercomputer architectures.Smith, James E.; Hsu, Wei-Chung; Hsiung, Christopher C.; WEI-CHUNG HSU Proceedings Supercomputing '90, New York, NY, USA, November 12-16, 199000
1251989On the Minimization of Loads/Stores in Local Register AllocationHsu, W.-C.; Fischer, C.N.; Goodman, J.R.; WEI-CHUNG HSU IEEE Transactions on Software Engineering340
1261988Code scheduling and register allocation in large basic blocks.Goodman, James R.; WEI-CHUNG HSU Proceedings of the International Conference on Supercomputing1350
1271987WISQ: A RESTARTABLE ARCHITECTURE USING QUEUES.Pleszkun, A.R.; Goodman, J.R.; Hsu, W-C; Joersz, R.T.; Bier, G.; Woest, P.; Schechter, P.B.; WEI-CHUNG HSU Annual Symposium on Computer Architecture
1281987WISQ: A Restartable Architecture Using Queues.Pleszkun, Andrew R.; Goodman, James R.; Hsu, Wei-Chung; Joersz, R. T.; Bier, George E.; Woest, Philip J.; Schechter, P. B.; WEI-CHUNG HSU Proceedings of the 14th Annual International Symposium on Computer Architecture. Pittsburgh, PA, USA, June 198790
1291986ON THE USE OF REGISTERS VS. CACHE TO MINIMIZE MEMORY TRAFFIC.Goodman, James R.; Hsu, Wei-Chung; WEI-CHUNG HSU Annual Symposium on Computer Architecture