Results 1-132 of 132 (Search time: 0.01 seconds).

Issue DateTitleAuthor(s)SourcescopusWOSFulltext/Archive link
12023A 511-<inline-formula> <tex-math notation="LaTeX">$\mu$</tex-math> </inline-formula>W 89-dB-SNDR Asynchronous SAR-ISDM ADC With Noise Shaping Dynamic Amplifier and Time-Domain Noise-Slicing TechniqueChang, Hao Hsuan; Chen, Ci Ren; TAI-CHENG LEE IEEE Journal of Solid-State Circuits
22022Path-Based Pre-Routing Timing Prediction for Modern Very Large-Scale Integration DesignsChen, Li Wei; Sui, Yao Nien; TAI-CHENG LEE ; Li, Yih Lang; Chao, Mango C.T.; Tsai, I. Ching; Kung, Tai Wei; Liu, En Cheng; Chang, Yun ChihProceedings - International Symposium on Quality Electronic Design, ISQED10
32022A Type-3 FMCW Radar Synthesizer with Wide Frequency Modulation BandwidthChen, Cheng Tang; Yang, Yu Hong; TAI-CHENG LEE Proceedings - IEEE International Symposium on Circuits and Systems00
42022A Single-Channel 1-GS/s 7.48-ENOB Parallel Conversion Pipelined SAR ADC with a Varactor-Based Residue AmplifierChang H; Lin T; TAI-CHENG LEE IEEE Transactions on Circuits and Systems II: Express Briefs00
52022An Asynchronous Zero-Crossing-Based Incremental Delta-Sigma ConverterLai Y.-P; Chang H.-H; TAI-CHENG LEE 2022 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 2022 - Proceedings00
62022A 6.0-11.0-Gb/s Reference-Less Sub-Baud-Rate Linear CDR with Wide-Range Frequency Acquisition TechniqueYang Y; Tzou M; TAI-CHENG LEE IEEE Transactions on Circuits and Systems II: Express Briefs00
72020Analysis and Design of a Self-Charged Crystal Oscillator with Pulse Regulating Feedback LoopCheng, H.-C.; Yang, Y.-H.; TAI-CHENG LEE 2020 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 202000
82020A 5.25GHz Subsampling PLL with a VCO-Phase-Noise Suppression TechniqueTing, H.-H.; TAI-CHENG LEE Digest of Technical Papers - IEEE International Solid-State Circuits Conference80
92020A Wireline Termination Embedded Energy Harvesting System with 300-�gW ExtractedYang, Y.-H.; Lee, T.-C.; TAI-CHENG LEE IEEE Solid-State Circuits Letters00
102019Incremental Timing-Driven Placement With Approximated Signoff Wire Delay and Regression-Based Cell Delay.Lee, Tai-Cheng; Li, Yih-Lang; TAI-CHENG LEE IEEE Trans. VLSI Syst.41
112019A SAR-assisted continuous-time incremental �m�_ adc with first-order noise couplingHsieh, Y.-L.; Lee, T.-C.; TAI-CHENG LEE Proceedings of International Conference on ASIC00
122018A 10-bit 2.6-GS/s Time-Interleaved SAR ADC with a Digital-Mixing Timing-Skew Calibration TechniqueLin, C.-Y.; Wei, Y.-H.; Lee, T.-C.; TAI-CHENG LEE IEEE Journal of Solid-State Circuits5048
132018F2: FinFETs & FDSOI - A mixed signal circuit designer's perspective.Srinivasan, Venkatesh; Tuai, Stephane Le; Lee, Tai-Cheng; TAI-CHENG LEE 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 201800
142018A 10b 2.6GS/s Time-Interleaved SAR ADC with Background Timing-Skew CalibrationC-Y Lin; Y-H Wei; T-C Lee; TAI-CHENG LEE IEEE Journal of Solid-State Circuits290
152018A 5-GHz Chirp Frequency Synthesizer with a Low 1/f Noise LC OscillatorT-C Lee; D-N Jhou; TAI-CHENG LEE PIERS 2018
162017Few-Mode 850-nm VCSEL Chip with Direct 16-QAM OFDM encoding at 80-Gbit/s for 100-m OM4 MMF LinkKao, H.-Y.; Tsai, C.-T.; Pong, C.-Y.; Liang, S.-F.; Weng, Z.-K.; Chi, Y.-C.; Kuo, H.-C.; Huang, J.J.; Lee, T.-C.; Shih, T.-T.; Jou, J.-J.; Cheng, W.-H.; Wu, C.-H.; Lin, G.-R.; TAI-CHENG LEE 2017 Optical Fiber Communications Conference and Exhibition, OFC 2017 - Proceedings3
172017A 5.12-GHz fractional-N frequency synthesizer with an LC-VCO-based MDLLJhou, D.-E.; Chang, W.-S.; Lee, T.-C.; TAI-CHENG LEE IEEE Symposium on VLSI Circuits, Digest of Technical Papers10
182017Multi-Mode VCSEL Chip with High-Indium-Density InGaAs/AlGaAs Quantum-Well Pairs for QAM-OFDM in Multi-Mode FiberTsai, C.-T.; Peng, C.-Y.; Wu, C.-Y.; Leong, S.-F.; Kao, H.-Y.; Wang, H.-Y.; Chen, Y.-W.; Weng, Z.-K.; Chi, Y.-C.; Kuo, H.-C.; Huang, J.J.; Lee, T.-C.; Shih, T.-T.; Jou, J.-J.; Cheng, W.-H.; Wu, C.-H.; TAI-CHENG LEE ; JIAN-JANG HUANG ; GONG-RU LIN ; CHAO-HSIN WU IEEE Journal of Quantum Electronics300
192017Session 28 overview: Hybrid ADCs.Lee, Tai-Cheng; Verbruggen, Bob; Moon, Un-Ku; TAI-CHENG LEE 2017 IEEE International Solid-State Circuits Conference, ISSCC 2017, San Francisco, CA, USA, February 5-9, 201700
202017An Energy-Efficient Self-Charged Crystal Oscillator with a Quadrature-Phase Shifter TechniqueW-S Chang; D-N Jhou; Y-H Yang; T-C Lee; TAI-CHENG LEE IEEE Asian Solid-State Circuit Conference20
212017Efficient Heat Dissipation of Uncooled 400-Gbps (16×25-Gbps) Optical Transceiver Employing Multimode VCSEL and PD ArraysTien-Tsorng Shih et al.; Yu-Chieh Chi; Ruei-Nian Wang; CHAO-HSIN WU ; JIAN-JANG HUANG ; Jau-Ji Jou; TAI-CHENG LEE ; Hao-Chung Kuo; GONG-RU LIN ; Wood-Hi ChengScientific Reports1310
222017A 10-Gb/s Equalizer with Digital AdaptationJ-C Hsiao; T-C Lee; TAI-CHENG LEE International SoC Design Conference00
232017A 5.12-GHz Fractional-N clock multiplier with an LC-VCO-based MDLLD-N Jhou; W-S Chang; T-C Lee; TAI-CHENG LEE IEEE Symposium on VLSI Circuits
242016Technique for In-Band Phase Noise Reduction in Fractional-N Frequency SynthesizersC-P Wang; T-C Lee; TAI-CHENG LEE IEEE Asian Solid-State Circuit Conference10
252016A 200-MS/s phase-detector-based comparator with 400-μVrms noiseLin, C.-Y.; Wong, C.-H.; Hsu, C.-H.; Wei, Y.-H.; TAI-CHENG LEE IEEE Transactions on Circuits and Systems II: Express Briefs33
262016A 5 GHz Fractional-N ADC-Based Digital Phase-Locked Loops With-243.8 dB FOMChang, W.-S.; Lee, T.-C.; TAI-CHENG LEE IEEE Transactions on Circuits and Systems I: Regular Papers109
272016Session 15 overview: Oversampling data converters.Srinivasan, Venkatesh; Lee, Tai-Cheng; TAI-CHENG LEE 2016 IEEE International Solid-State Circuits Conference, ISSCC 2016, San Francisco, CA, USA, January 31 - February 4, 201600
282016Ultra-Low Power One-Pin Crystal Oscillator with Self-Charged TechniqueS-C Wu; T-C Lee; TAI-CHENG LEE IET Electronic Letters33
292016Analog-to-digital converting system and converting methodT-C Lee; C-Y Lin; Y-H Wei; TAI-CHENG LEE 
302016A Compact Multi-Input Power Conversion System with High Time-Efficiency Inductor�VSharing Technique for Thermoelectric Energy Harvesting ApplicationsC-L Chang; T-C Lee; TAI-CHENG LEE Journal of Circuits, Systems and Computers (JCSC)21
312016A 200-MS/s Phase-Detector-Based Comparator with 400-uVrms NoiseC-Y Lin; C-H Wong; C-H Hsu; Y-H Wei; T-C Lee; TAI-CHENG LEE IEEE Transactions on Circuits and Systems, Part II
322016A 2X25Gb/s 20mW serializing transmitter with 2.5:1 multiplexers in 40nm technologyB-C Lin; W-S Chang; T-C Lee; TAI-CHENG LEE IEEE VLSI-DAT00
332016A 12-bit 210-MS/s 2-Times Interleaved Pipelined-SAR ADC With a Passive Residue Transfer TechniqueC-Y Lin; T-C Lee; TAI-CHENG LEE IEEE Transactions on Circuits and Systems, Part I2422
342016An thermoelectric and RF multi-source energy harvesting systemC-L Chang; T-C Lee; TAI-CHENG LEE 2nd International Conference on Intelligent Green Building and Smart Grid (IGBSG)20
352016A 5 GHz Fractional- N ADC-Based Digital Phase-Locked Loops With ?243.8 dB FOMW-S Chang; T-C Lee; TAI-CHENG LEE IEEE Transactions on Circuits and Systems, Part I
362015A Single-Channel 10-b 400-MS/s 8.7-mW Pipeline ADC in a 90-nm TechnologyC-K Hsu; T-C Lee; TAI-CHENG LEE IEEE Asian Solid-State Circuit Conference40
372015An 84.7-DR Wide BW Incremental ADCT-Y Wang; T-C Lee; TAI-CHENG LEE IEEE VLSI-DAT10
382014A Compact Multi-Input Thermoelectric Energy Harvesting System with 58.5% Power Conversion Efficiency and 32.4-mW Output Power CapabilityC-L Chang; T-C Lee; TAI-CHENG LEE International Symposium on Integrated Circuits70
392014A 2.3-GHz Fractional-N Divider-less Phase-Locked Loop with -112dBc/Hz In-Band Phase NoiseP-C Huang; W-S Chang; T-C Lee; TAI-CHENG LEE IEEE Journal of Solid-State Circuits 
402014A 6-Gb/s Adaptive-Loop-Bandwidth Clock and Data Recovery (CDR) CircuitsL-H Chiueh; T-C Lee; TAI-CHENG LEE IEEE Asian Solid-State Circuit Conference80
412014Circuit for spread spectrum transmission and method thereofT-C Lee; C-W Wong; TAI-CHENG LEE 
422014A 12-bit 210-MS/s 5.3-mW pipelined-SAR ADC with a passive residue transfer techniqueC-Y Lin; T-C Lee; TAI-CHENG LEE IEEE Symposium on VLSI Circuits260
432014A 20-MHz BW 75-dB SFDR shifted-averaging VCO-based ΔΣ modulatorY-H Kang; C-Y Lin; T-C Lee; TAI-CHENG LEE IEEE ISCAS 
442014A 3X-oversampling hybrid clock and data recovery circuit with programmable bandwidthJ-A Cheng; W-S Chang; T-C Lee; TAI-CHENG LEE IEEE VLSI-DAT10
4520142.4-GHz High-Efficiency Adaptive Power HarvesterC-C Lee; T-C Lee; TAI-CHENG LEE IEEE Transactions on Very Large Scale Integration Systems5649
462014A 2.3-GHz Fractional-N Divider-less Phase-Locked Loop with -112dBc/Hz In-Band Phase NoiseP-C Huang; W-S Chang; T-C Lee; TAI-CHENG LEE International Solid-State Circuit Conference 
472014A 20-MHz BW 75-dB SFDR shifted-averaging VCO-based ΔΣ modulator.Kang, Yu-Hsuan; Lin, Chin-Yu; Lee, Tai-Cheng; TAI-CHENG LEE IEEE International Symposium on Circuits and Systemss, ISCAS 2014, Melbourne, Victoria, Australia, June 1-5, 201400
482014A 2.3GHz fractional-N dividerless phase-locked loop with -112dBc/Hz in-band phase noiseHuang, P.-C.; Chang, W.-S.; Lee, T.-C.; TAI-CHENG LEE Digest of Technical Papers - IEEE International Solid-State Circuits Conference330
492014A fractional-N divider-less phase-locked loop with a subsampling phase detectorChang, W.-S.; Huang, P.-C.; Lee, T.-C.; TAI-CHENG LEE IEEE Journal of Solid-State Circuits5351
502013Pipelined analog-to-digital converter and method for converting analog signal to digital signal,Y-C Huang; T-C Lee; TAI-CHENG LEE 
512013A 6-GHz Self-Oscillating Spread-Spectrum Clock GeneratorC-H Wong; T-C Lee; TAI-CHENG LEE IEEE Transactions on Circuits and Systems, Part I65
522013Analysis of the Leakage Effect in a Pipelined ADC with Nanoscale CMOS TechnologiesC-Y Lin Y-C Huang; T-C Lee; TAI-CHENG LEE IEEE VLSI-DAT00
532013Jitter Error Cancellation Technique in Digital Domain for ADCC-Y Lin; T-C Lee; TAI-CHENG LEE IEEE VLSI-DAT10
542012A 6-GHz All Digital PLL for Spread Spectrum Clock Generators (SSCG)C-D Su; C-W Lee; T-C Lee; TAI-CHENG LEE International Journal of Electrical Engineering0
552012A 10-bit 200-MS/s Reconfigurable Pipelined A/D ConverterC-C Ho; T-C Lee; TAI-CHENG LEE IEEE VLSI DAT10
562012Guest editorial: Special issue for the 23 rd VLSI design/CAD symposium (VLSI design/CAD 2012)Lee, T.-C.; Chien, S.-Y.; Yang, C.-L.; TAI-CHENG LEE International Journal of Electrical Engineering0
572011A 10-b 400Ms/s 36mW interleaved ADCY-C Huang; C-Y Lin; T-C Lee; TAI-CHENG LEE IEEE RFIT Symposium 
582011A 10-bit 100 MS/s 4.5 mW Pipelined ADC with a Time Sharing TechniquesY-C Huang; T-C Lee; TAI-CHENG LEE IEEE Transactions on Circuits and Systems, Part I2018
592011Digital-to-analog converter (DAC) and an associated methodT-C Lee; C-H Lin; TAI-CHENG LEE 
602011Spilt-based Digital Background Calibration of Multistage Nonlinear Errors in Pipelined ADCSP Zhang; T-C Lee; TAI-CHENG LEE International Conference on Sampling Theory and Applications 
612011Method for achieving high-speed analog-to-digital conversion without degrading accuracy, and associated apparatusL-H Hung; T-C Lee; TAI-CHENG LEE 
622011The Design and Analysis of Dual-Delay-Path Ring OscillatorsZ-Z Chen; T-C Lee; TAI-CHENG LEE IEEE Transactions on Circuits and Systems, Part I7257
632011The Study of a Dual-Mode Ring OscillatorZ-Z Chen; TAI-CHENG LEE IEEE Transactions on Circuits and Systems, Part II1815
642011A 10-bit 400-MS/s 36-mW interleaved ADCHuang, Y.-C.; Lin, C.-Y.; Lee, T.-C.; TAI-CHENG LEE 2011 IEEE International Symposium on Radio-Frequency Integration Technology, RFIT 201120
652010An All&#8208;Digital De&#8208;skew Clock Generator for Arbitrary Wide Range DelayK Fong; Z-Z Chen; T-C Le; TAI-CHENG LEE IEEE Asian Pacific Conference on Circuits and Systems50
662010Nonlinear R-2R Transistor-Only DACT-C Lee; C-H Lin; TAI-CHENG LEE IEEE Transactions on Circuits and Systems I: Regular Papers76
672010A 300- to 800-MHz De-Skew Clock Generator for Arbitrary DelayY-C Hung; K Fong; T-C Lee; TAI-CHENG LEE IEEE Asian Solid-State Circuit Conference00
682010An Offset Phase-Locked Loop Spread Spectrum Clock Generator for SATA IIIC-Y Lin; C-Y Chiang; T-C Lee; TAI-CHENG LEE IEEE Custom Integrated Circuits Conference10
692010A 320-MHz CMOS Continuous-Time ΔΣ Modulator With 5-MHz Signal Bandwidth and 8.3-bit ENOBK-T Chen; T-C Lee; TAI-CHENG LEE International Journal of Electrical Engineering 
702010A 0.02-mm2 9-bit 50-MS/s Cyclic ADC in a 90-nm Digital CMOS TechnologyYen-Chuan Huang; Tai-Cheng Lee; TAI-CHENG LEE IEEE Journal of Solid-State Circuits1918
712010A 10-bit 100 MS/s 4.5 mW Pipelined ADC with a Time Sharing TechniquesYen-Chuang Huang; Tai-Cheng Lee; TAI-CHENG LEE International Solid-State Circuit Conference2018
722010A 10-bit piplined A/D converter with split calibration and opamp-sharing techniqueHung, L.-H.; Huang, Y.-C.; Lee, T.-C.; TAI-CHENG LEE Proceedings of 2010 International Symposium on VLSI Design, Automation and Test, VLSI-DAT 201000
732010雙後輪轂馬達驅動之電動車運動與防滑控制戴正; Tai, Cheng 
742010A 10b 100MS/s 4.5mW pipelined ADC with a time sharing techniqueHuang, Y.-C.; Lee, T.-C.; TAI-CHENG LEE Digest of Technical Papers - IEEE International Solid-State Circuits Conference290
752009A Low-Jitter 8GHz to 10GHz Distributed DLL for Multiple-Phase Clock GenerationK-J Hsian; Tai-Cheng Lee; TAI-CHENG LEE IEEE Journal of Solid-State Circuits 
762009A split-based digital background calibration technique in pipelined ADCsHung, L.-H.; TAI-CHENG LEE IEEE Transactions on Circuits and Systems II: Express Briefs2318
772009An 8-GHz to 10-GHz distributed DLL for multiphase clock generationHsiao, K.-J.; Lee, T.-C.; TAI-CHENG LEE IEEE Journal of Solid-State Circuits2016
782008A 6-bit Pipelined Analog-to-Digital Converter with Current-Switching Open-Loop Residue AmplificationFeng-Chiu Hsieh; Tai-Cheng; TAI-CHENG LEE IEEE Asian Solid-State Circuit Conference70
792008An 833-MHz 132-Phase Multiphase Clock Generator with Self-Calibration CircuitsShih-Chun Lin; Tai-Cheng Lee; TAI-CHENG LEE IEEE Aisan Solid-State Circuit Conference80
80200810GBase-T乙太網路系統晶片設計-子計畫三:適用於10GBase-T乙太網路接收機之類比前端電路(2/2)李泰成 
81200810GBase-T乙太網路系統晶片設計-子計畫三:適用於10GBase-T乙太網路接收機之類比前端電路(1/2)李泰成 
822008可應用於軟性電子的TFT電路設計技術之開發-子計畫三:軟性電子之強健及微小化的顯示驅動及其週邊電路設計(1/3)李泰成 
832008可應用於軟性電子的TFT電路設計技術之開發-子計畫三:軟性電子之強健及微小化的顯示驅動及其週邊電路設計(2/3)李泰成 
842008A Fully Integrated 36MHz to 230MHz Multiplying DLL with Adaptive Current TuningK-J Hsiao; T-C Lee; TAI-CHENG LEE IEEE Journal of Solid-State Circuits4
852008A clock and data recovery circuit with wide linear range frequency detectorK-J Hsiao; M-H Lee; T-C Lee; TAI-CHENG LEE IEEE VLSI-DAT20
862008A 4-PAM Adaptive Analog Equalizer for Backplane InterconnectionsY-C Huang; Q-T Chen; T-C Lee; TAI-CHENG LEE IEEE VLSI-DAT50
872008A Multiphase Compensation Method with Dynamic Element Matching Technique in �U-�G Fractional-�P Frequency SynthesizersChen, Zuow-Zun; Lee, Tai-Cheng Journal of Semiconductor Technology and Science 00
882008A low-jitter 8-to-10GHz distributed DLL for multiple-phase clock generationHsiao, K.-J.; TAI-CHENG LEE Digest of Technical Papers - IEEE International Solid-State Circuits Conference80
892008The design and analysis of a fully integrated multiplying DLL with adaptive current tuningHsiao, K.-J.; Lee, T.-C.; TAI-CHENG LEE IEEE Journal of Solid-State Circuits129
902007A 10-Bit Binary-Weighted DAC with Digital Background LMS CalibrationD.-L Shen; Y-C Lai; T.-C. Lee; TAI-CHENG LEE IEEE Asian Solid-State Circuit Conference100
912007A Fully Integrated 36MHz to 230MHz Multiplying DLL with Adaptive Current TuningK-J Hsiao; T-C Lee; TAI-CHENG LEE Symposium on VLSI Circuits40
922007A 4-Channel Poly-Phase Filter for Cognitive Radio SystemsG-J Chen; H-H Chiu; T-C Lee; TAI-CHENG LEE IEEE VLSI-DAT20
932007A Delay-Line-Based GFSK Demodulator for Low-IF ReceiversH-S Kao; M-J Yang; T-C Lee; TAI-CHENG LEE International Solid-State Circuit Conference (ISSCC)300
942007A 6-b 800-MS/s Pipelined A/D Converter with Open-Loop AmplifiersD.-L. Shen; TAI-CHENG LEE IEEE Journal of Solid-State Circuits2825
952006A 14-Gb/s 4-PAM adaptive analog equalizer for 40-inch backplane interconnectionsQ.-T. Chen; Y.-C. Huang; T.-C. Lee; TAI-CHENG LEE Asian Solid-State Circuit Conference (ASSCC)30
962006The design and analysis of a DLL-Based Frequency Synthesizer for UWB ApplicationT.-C. Lee; K.-J. Hsiao; TAI-CHENG LEE IEEE Journal of Solid-State Circuits5539
972006A 6-b 800-MS/s Pipelined A/D Converter with Open-loop AmplifiersD-L Shen; T-C Lee; TAI-CHENG LEE IEEE Symposium on VLSI Circuits425
982006The design and analysis of a Miller Divider Based Clock Generator for MBOA-UWB ApplicationY.-C. Huang; TAI-CHENG LEE IEEE Journal of Solid-State Circuits44
992006AAIC Homework 4Lee, Tai-Cheng 
1002006AAIC Homework 3Lee, Tai-Cheng 
1012006A 6-b 1.3Gs/s A/D Converter with C-2C Switch–Capacitor TechniqueY-M Liao; T-C Lee; TAI-CHENG LEE IEEE VLSI-DAT40
1022006AAIC 2006 Homework 1Lee, Tai-Cheng 
1032006A Mixed-Signal GFSK Demodulator for BluetoothC.-C. Chen; TAI-CHENG LEE IEEE Transactions on Circuits and Systems II: Express Briefs2722
1042006A Spur-Suppression Technique for Phase-Locked Frequency SynthesizersT.-C. Lee; W.-L. Lee; TAI-CHENG LEE IEEE International Solid-State Circuit Conference (ISSCC) 00
1052005A 40-GHz Distributed-Load Static DividerT.-C. Lee; etal; TAI-CHENG LEE IEEE Asian Solid-State Circuit Conference110
1062005總計畫:具有內建自我測試功能之5GHz超低功率無線通訊系統之研製 子計畫二:超低功率類比前端處理器李泰成 
1072005A DLL-Based Frequency Multiplier For MBOA-UWB SystemK-J Hsiao; TAI-CHENG LEE IEEE Symposium on VLSI Circuits130
1082005A Miller Divider Based Clock Generator for MBOA-UWB ApplicationT. C. Lee; Y. C. Huang; TAI-CHENG LEE IEEE Symposium on VLSI Circuits40
1092005An Optimization Technique for RF Buffers with Active InductorsT. C. Lee; Y. C. Huang; TAI-CHENG LEE ISCAS40
1102005A Linear-Approximation Technique for Digitally-Calibrated Pipelined ADCsD. L. Shen; TAI-CHENG LEE Proceedings - IEEE International Symposium on Circuits and Systems70
1112005A Stabilization technique for phase-locked frequency synthesizersT-C Lee; B. Razavi; TAI-CHENG LEE 11
1122005百億位元的乙太網路系統晶片設計─子計畫四:超高速類比訊號處理器(3/3)李泰成 
1132005High-precision frequency synthesizers for UWB applicationsLee, T.-C.; Hsiao, K.-J.; Huang, Y.-C.; TAI-CHENG LEE Emerging Information Technology Conference 200520
1142004適用於xDSL 之信號驅動器李泰成 
1152004An 8-bit 2-V 2-mW 0.25-mm/sup 2/ CMOS DACWang, Huei-Chi; Kao, Hong-Sing; Lee, Tai-Cheng Advanced System Integrated Circuits 2004 00
1162004An 8-bit 2-V 2-mW 0.25-mm2 CMOS DACH. C. Wang; H. S. Kao; T. C. Lee; TAI-CHENG LEE AP-ASIC40
1172004A 6-bit 500-Ms/s digital self-calibrated pipelined analog-to-digital converterChen, Yu-Hsun; Lee, Tai-Cheng Advanced System Integrated Circuits 200400
11820046 bits 500-Ms/s Digital Self-Calibrated Pipelined Analog-to-Digital ConverterY. H. Chen; T. C. Lee; TAI-CHENG LEE AP-ASIC 00
1192004子計畫四:超高速類比訊號處理器(2/3)李泰成 
1202004A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifierTsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng ; Wang, Chorng-Kuang2004 International Symposium on Circuits and Systems, 2004. ISCAS '04
1212004A 10 Gbase-LX4 receiver front end transimpedance amplifier and limiting amplifier.Tsai, Hung-Chieh; Yeh, Jyh-Yih; Tu, Wei-Hsuan; Lee, Tai-Cheng; Wang, Chorng-Kuang; TAI-CHENG LEE Proceedings of the 2004 International Symposium on Circuits and Systems, ISCAS 2004, Vancouver, BC, Canada, May 23-26, 2004
1222004具有內建自我測試功能之5GHz超低功率無線通訊系統之研製─子計畫二:超低功率類比前端處理器李泰成 
1232003A stabilization technique for phase-locked frequency synthesizersLee, T.-C.; Razavi, B.; TAI-CHENG LEE IEEE Journal of Solid-State Circuits5236
1242003A stabilization technique for phase-locked frequency synthesizersLee, T.-C.; Razavi, B.; TAI-CHENG LEE Phase-Locking in High-Performance Systems: From Devices to Architectures00
1252003百億位元的乙太網路系統晶片設計─子計劃四:超高速類比訊號處理器(1/3)李泰成 
1262002CMOS 2.4-GHz receiver front end with area-efficient inductors and digitally calibrated 90/spl deg/ delay networkTang, Chih-Chun; Wu, Chia-Hsin; Li, Kun-Hsien; Lee, Tai-Cheng ; Liu, Shen-Iuan IEEE International Symposium on Circuits and Systems, 2002. ISCAS 200200
1272001A Stabilization Technique for Phase-Locked Frequency SynthesizersT. C. Lee; B. Razavi; TAI-CHENG LEE IEEE VLSI Circuits Symposium110
1282001A 125-MHz Mixed-Signal Equalizer for Gigabit Ethernet on Copper WireT. C. Lee; B. Razavi; TAI-CHENG LEE IEEE Custom Integrated Circuits Conference360
1292001A 4-Tap 125-MHz Mixed-Signal Echo Canceller for Gigabit Ethernet on Copper WireT. C. Lee; B. Razavi; TAI-CHENG LEE IEEE Journal of Solid-State Circuits3
1302001High-Speed CMOS Circuits for Gigabit EthernetT. C. Lee; TAI-CHENG LEE 
1312001A 125-MHz mixed-signal echo canceller for Gigabit Ethernet on copper wireLee, T.-C.; Razavi, B.; TAI-CHENG LEE IEEE Journal of Solid-State Circuits2619
1320A 12-bit 600-MS/s time-interleaved SAR ADC with background timing skew calibration5. Y-H Wei; C-Y Lin; T-C Lee; TAI-CHENG LEE IEEE International Symposium on Radio-Frequency Integration Technology (RFIT)130