https://scholars.lib.ntu.edu.tw/handle/123456789/122158
標題: | A 50-GHz divide-by-4 injection lock frequency divider using matching method | 作者: | Chaung, Mei-Chen Kuo, Jhe-Jia Wang, Chi-Hseuh HUEI WANG |
關鍵字: | Complementary metal-oxide semiconductor (CMOS) integrated circuits (ICs); Injection-locked oscillators; Millimeter-wave circuits | 公開日期: | 五月-2008 | 起(迄)頁: | 344-346 | 來源出版物: | IEEE Microwave and Wireless Components Letters | 摘要: | A fully integrated divide-by-4 frequency divider has been designed, fabricated, and measured in the standard bulk 0.18- μm complementary metal-oxide semiconductor (CMOS) technology. A newly proposed matching technique was used to eliminate the unwanted low frequency mixing terms at the common node of the circuit so as to achieve a high division ratio of 4. The frequency divider exhibits a measured operation range of 5 GHz from 45.9 to 50.9 GHz. It consumes a dc power of 7.56 mW at a 1.2 V supply in the steady state operation. The phase noise of the free running divider is -88.51 dBc/Hz at 1 MHz offset and the locked divider is -110.74 dBc/Hz at 1 MHz offset. The chip size is only 0.35 mm × 0.5 mm including the pad frame. To our knowledge, this divider has the highest operation frequency to date among the high division ratio injection-lock type frequency dividers in commercial CMOS 0.18-μm process. © 2006 IEEE. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-44049101764&doi=10.1109%2fLMWC.2008.922127&partnerID=40&md5=712cbdd1f343ec2accecedc25e1afe6b | DOI: | 10.1109/LMWC.2008.922127 |
顯示於: | 電信工程學研究所 |
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