https://scholars.lib.ntu.edu.tw/handle/123456789/147656
標題: | Temperature-Aware Placement for SOCs | 作者: | Tsai, Jeng-Liang Chen, Charlie Chung-Ping Chen, Guoqiang Goplen, Brent Qian, Haifeng Zhan, Yong Kang, Steve Sung-M Wong, Martin D.F. Sapatnekar, Sachin S. |
關鍵字: | Physical design;placement;thermal analysis;thermal simulation | 公開日期: | 八月-2006 | 出版社: | Taipei:National Taiwan University Dept Chem Engn | 期: | No. 8 | 起(迄)頁: | - | 來源出版物: | Vol. 94 | 摘要: | Dramatic rises in the power consumption and integration density of contemporary systems-on-chip (SoCs) have led to the need for careful attention to chip-level thermal integrity. High temperatures or uneven temperature distributions may result not only in reliability issues, but also timing failures, due to the temperature-dependent nature of chip time-to-failure and delay, respectively. To resolve these issues, high-quality, accurate thermal modeling and analysis, and thermally oriented placement optimizations, are essential prior to tapeout. This paper first presents an overview of thermal modeling and simulation methods, such as finite-difference time domain, finite element, model reduction, random walk, and Green-function based algorithms, that are appropriate for use in placement algorithms. Next, two-dimensional and threedimensional thermal-aware placement algorithms such as matrix-synthesis, simulated annealing, partition-driven, and force directed are presented. Finally, future trends and challenges are described. |
URI: | http://ntur.lib.ntu.edu.tw//handle/246246/200611150121559 | 其他識別: | 246246/200611150121559 |
顯示於: | 電機工程學系 |
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