https://scholars.lib.ntu.edu.tw/handle/123456789/148923
標題: | Flipping structure: an efficient VLSI architecture for lifting-based discrete wavelet transform | 作者: | Huang, Chao-Tsung Tseng, Po-Chih LIANG-GEE CHEN |
關鍵字: | Computer architecture; Convolution; Delay; Discrete wavelet transforms; Filters; Hardware; Image coding; Pipeline processing; Transform coding; Very large scale integration | 公開日期: | 十月-2002 | 卷: | 1 | 起(迄)頁: | 383 - 388 | 來源出版物: | IEEE Asia-Pacific Conference on Circuits and Systems, Proceedings, APCCAS | 會議論文: | Asia-Pacific Conference on Circuits and Systems, APCCAS 2002 | 摘要: | Using the lifting scheme to construct VLSI architectures for discrete wavelet transforms outperforms using convolution in many aspects, such as computation complexity and boundary extension. Nevertheless, the critical path of the lifting scheme is potentially longer than that of convolution. Although pipelining can reduce the critical path, it will prolong the latency and require more registers for a 1D architecture as well as larger memory size for a 2D line-based architecture. In this paper, an efficient VLSI architecture is proposed to provide a variety of hardware implementations for improving and possibly minimizing the critical path and memory requirements of lifting-based discrete wavelet transforms by flipping conventional lifting structures. By case studies of a JPEG2000 defaulted filter and an integer filter, the efficiency of the proposed flipping structure is shown. © 2002 IEEE. |
URI: | http://ntur.lib.ntu.edu.tw//handle/246246/2007041910021067 https://www.scopus.com/inward/record.uri?eid=2-s2.0-0345299382&doi=10.1109%2fAPCCAS.2002.1114975&partnerID=40&md5=0515ce2df381340f54bce86b7e58089c |
其他識別: | N/A | DOI: | 10.1109/APCCAS.2002.1114975 | SDG/關鍵字: | Computer architecture; Computer hardware; Convolution; Filters (for fluids); Hardware; Image coding; Integrated circuit testing; Memory architecture; VLSI circuits; Wavelet transforms; Boundary extensions; Computation complexity; Delay; Hardware implementations; Lifting-based discrete wavelet transforms; Memory requirements; Pipeline processing; Transform coding; Discrete wavelet transforms |
顯示於: | 電機工程學系 |
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