https://scholars.lib.ntu.edu.tw/handle/123456789/151565
標題: | 適用於高速數位用戶迴路之DMT數位IP模組設計及實現 (I) Design and Implementation of Digital IP for DMT Engine in High-Speed DSL Applications (I) |
作者: | 吳安宇 | 關鍵字: | 離散多頻調變;反快速傅利葉轉換/快速傅利葉轉換;多維格子迴旋碼編解碼器;李德-所羅門編解碼器;矽智慧區塊;DMT;IFFT/FFT;TCM;Reed-Solomon;Intellectual property (IP) | 公開日期: | 31-七月-2001 | 出版社: | 臺北市:國立臺灣大學電機工程學系暨研究所 | 摘要: | 在DMT Modulation Engine中,高點數的反快速傅利葉轉換/快速傅利葉轉換(IFFT/FFT)、多維格子迴旋碼(Multi-dimensional TCM)編解碼器以及李德-所羅門(Reed-Solomon)編解碼器都是重要的核心模組。由於這些模組都具有高計算複雜度(Computational Complexity)的特性;若利用數位信號處理器(DSPs)來加以實現,這些模組的運作將會佔據太多的系統資源,而且無法達到即時運算的目的(Real-time Processing)。因此利用超大型積體電路(VLSI)來實現這些模組是比較適合的作法。因此,本子計畫研究的重點在於針對這些DMT Modulation Engine中的重要核心模組來設計高效能/低功率的數位IP (Intellectual Property)。 在這個子計畫中,首先我們將對各個模組做演算法上的分析,以期在演算法階層(Algorithmic Level),以設計空間搜尋(Design Space Exploration)方式 ,改進計算複雜度及節省記憶體空間/頻寬。接著針對其VLSI架構作推導,更進一步改善模組之速度/功率/面積,最後將落實於VLSI電路實現。計畫目標為建立一組高效能/低功率的數位IP模組,供子計畫二之DMT基頻架構使用。同時,我們並以可重設組態的(Reconfigurable)IP為研究之重點,以達到IP再使用(Reuse)及快速雛型設計(Rapid Prototyping)之目的。 High-point IFFT/FFT, 4D-TCM codec and Reed-Solomon codec are the kernel modules in DMT modulation Engine. Due to the massive computational complexity, the implementation of these modules by DSP processor will dominate the computational complexity and cannot achieve real-time data processing in practical implementations. Hence, using VLSI to implement those digital IPs would be a better solution. The main goal of this project is to design high-performance/low-power digital IP modules in the DMT engine. In this project, we will first analyze the algorithms of each IP module. By applying "design space exploration", we seek to find optimized design to reduce the computational complexity and memory space/bandwidth at the algorithmic level. At the architectural/circuit level, we will derive effective VLSI architectures and circuits to further improve the area/speed/power performance. By the end of the project, we will implement these IP modules down to ASIC level. The final goal is to create a set of high-speed/low-power digital IP modules for the DMT baseband architecture developed in sub-project 2, and link with other modules of the group project. Also, to achieve the goal of IP reuse and rapid prototyping, we will also explore the reconfigurable structures for these IPs. |
URI: | http://ntur.lib.ntu.edu.tw//handle/246246/7821 | 其他識別: | 892218E002108 | Rights: | 國立臺灣大學電機工程學系暨研究所 |
顯示於: | 電機工程學系 |
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892218E002108.pdf | 348.65 kB | Adobe PDF | 檢視/開啟 |
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