https://scholars.lib.ntu.edu.tw/handle/123456789/289909
標題: | Hard ware-software timing co-verification of distributed embedded systems | 作者: | Jih-Ming, F.U. Lee Trong-Yen Hsiung, P.-A. SAO-JIE CHEN |
關鍵字: | Coverification; Distributed embedded systems; Hard deadline; Hardware-software codesign; Linear hybrid automata | 公開日期: | 2000 | 卷: | E83-D | 期: | 9 | 起(迄)頁: | 1731-1740 | 來源出版物: | IEICE Transactions on Information and Systems | 摘要: | Most of current codesign tools or methodologies only support validation in the form of cosimulation and testing of design alternatives. The results of hardware-software codesign of a distributed system are often not verified, because they are not easily verifiable. In this paper, we propose a new formal coverification approach based on linear hybrid automata, and an algorithm for automatically converting codesign results to the linear hybrid automata framework. Our coverification approach allows automatic verification of real-time constraints such as hard deadlines. Another advantage is that the proposed approach is suitable for verifying distributed systems with arbitrary communication patterns and system architecture. The feasibility of our approach is demonstrated through several application examples. The proposed approach has also been successfully used in verifying deadline violations when there are inter-task communications between tasks with different period lengths. |
URI: | http://www.scopus.com/inward/record.url?eid=2-s2.0-0034272095&partnerID=MN8TOARS http://scholars.lib.ntu.edu.tw/handle/123456789/289909 |
ISSN: | 09168532 | SDG/關鍵字: | Coverification method; Hardware-software codesign; Algorithms; Automata theory; Computer hardware; Computer software; Constraint theory; Distributed computer systems; Embedded systems |
顯示於: | 電機工程學系 |
在 IR 系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。