https://scholars.lib.ntu.edu.tw/handle/123456789/292343
標題: | Pipeline direct digital frequency synthesiser using decomposition method | 作者: | Yu, T.-B. HEN-WAI TSAO SHEN-IUAN LIU |
公開日期: | 2001 | 卷: | 148 | 期: | 3 | 起(迄)頁: | 141-144 | 來源出版物: | IEE Proceedings: Circuits, Devices and Systems | 摘要: | A direct digital frequency synthesiser using a new decomposition method without the large sine ROM table is presented. To improve its operating frequency a pipeline structure has been utilised. It has been fabricated in a 0.6μm single-poly double-metal (SPDM) CMOS process and its core area is 0.95 × 1.1mm2. The maximum operating frequency is 85 MHz. For a 10MHz sinusoidal output, the phase noise is -114dBc/Hz at an offset frequency of 10kHz. The measured SNR is 60.77dB and worst case spurious is -67.6dBc. Its power dissipation is 80mW at 80MHz under the 5V supply. |
URI: | http://www.scopus.com/inward/record.url?eid=2-s2.0-0035360494&partnerID=MN8TOARS http://scholars.lib.ntu.edu.tw/handle/123456789/292343 |
DOI: | 10.1049/ip-cds:20010158 | SDG/關鍵字: | CMOS integrated circuits; Phase locked loops; Pipeline processing systems; ROM; Signal to noise ratio; Single mode fibers; Spurious signal noise; Wireless telecommunication systems; Pipeline direct digital frequency synthesizers; Frequency synthesizers |
顯示於: | 電機工程學系 |
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