https://scholars.lib.ntu.edu.tw/handle/123456789/294324
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | P. F. Lin | en_US |
dc.contributor.author | J. B. Kuo | en_US |
dc.contributor.author | JAMES-B KUO | zz |
dc.creator | P. F. Lin; J. B. Kuo | - |
dc.date.accessioned | 2018-09-10T03:50:14Z | - |
dc.date.available | 2018-09-10T03:50:14Z | - |
dc.date.issued | 2001-04 | - |
dc.identifier.uri | http://scholars.lib.ntu.edu.tw/handle/123456789/294324 | - |
dc.language | en | en |
dc.relation.ispartof | IEEE Journal of Solid-State Circuits | en_US |
dc.source | AH-anncc | - |
dc.title | A 1-V 128-kb four-way set-associative CMOS cache memory using wordline-oriented tag-compare (WLOTC) structure with the content-addressable-memory (CAM) 10-transistor tag cell | - |
dc.type | journal article | en |
dc.identifier.doi | 10.1109/4.913745 | - |
dc.identifier.scopus | 2-s2.0-0035307453 | - |
dc.identifier.isi | WOS:000167873300011 | - |
dc.relation.pages | 666-675 | - |
dc.relation.journalvolume | 36 | - |
dc.relation.journalissue | 4 | - |
item.fulltext | no fulltext | - |
item.grantfulltext | none | - |
item.openairetype | journal article | - |
item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
item.cerifentitytype | Publications | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
顯示於: | 電機工程學系 |
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