https://scholars.lib.ntu.edu.tw/handle/123456789/299084
Title: | A 0.8-V 128-Kb Four-Way Set-Associative Two-Level CMOS Cache Memory Using Two-Stage Wordline/Bitline-Oriented Tag-Compare (WLOTC/BLOTC) Scheme | Authors: | P. F. Lin J. B. Kuo JAMES-B KUO |
Issue Date: | Oct-2002 | Journal Volume: | 37 | Journal Issue: | 10 | Start page/Pages: | 1307-1317 | Source: | IEEE Journal of Solid-State Circuits | URI: | http://scholars.lib.ntu.edu.tw/handle/123456789/299084 | DOI: | 10.1109/JSSC.2002.803023 |
Appears in Collections: | 電機工程學系 |
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