https://scholars.lib.ntu.edu.tw/handle/123456789/332290
標題: | Graph-theoretic sufficient condition for FPGA/FPIC switch-module routability | 作者: | Wong, D.F. Wong, C.K. YAO-WEN CHANG |
公開日期: | 1997 | 卷: | 3 | 起(迄)頁: | 1572-1575 | 來源出版物: | IEEE International Symposium on Circuits and Systems | 摘要: | Switch modules are the most important component of the routing resources in FPGA's/FPIC's. We consider in this paper an FPGA/FPIC switch-module analysis problem: The inputs consist of a switch-module description and the number of nets required to be routed through the switch module; the question is to determine if there exists a feasible routing for the routing requirements on the switch module. This problem is applicable to the routability evaluation of FPGA/FPIC switch modules, the switch-module design for FPGA's/FPIC's, and FPGA/FPIC routing. We present a graph-theoretic sufficient condition for the analysis problem. The implications of the condition are: (1) there exist several classes of efficient approximation algorithms for the analysis problem; (2) there exist several classes of switch-module architectures on which the analysis problem can be solved efficiently. |
URI: | http://www.scopus.com/inward/record.url?eid=2-s2.0-0030719813&partnerID=MN8TOARS http://scholars.lib.ntu.edu.tw/handle/123456789/332290 |
ISSN: | 02714310 | SDG/關鍵字: | Algorithms; Approximation theory; Electric network analysis; Graph theory; Integrated circuit layout; Logic gates; Microprocessor chips; Problem solving; Switching circuits; Switching networks; Field programmable gate arrays (FPGA); Field programmable interconnected chip (FPIC); Logic design |
顯示於: | 電子工程學研究所 |
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