https://scholars.lib.ntu.edu.tw/handle/123456789/338627
標題: | Silicon oxide gate dielectric on n-type 4H-SiC prepared by low thermal budget anodization method | 作者: | Chuang, K.-C. JENN-GWO HWU |
公開日期: | 2008 | 卷: | 155 | 期: | 8 | 來源出版物: | Journal of the Electrochemical Society | 摘要: | Metal-oxide-semiconductor (MOS) capacitors with silicon oxide (SiO2) as the gate dielectric were fabricated on n-type 4H-SiC. SiO2 was prepared by the room-temperature anodization (ANO) method followed by rapid thermal annealing. Thin SiO2 oxide layers (27-48 Å) were produced with various ANO time. The interfacial transition layer is not observed in this work. The oxide breakdown strengths are greater than 5 MV/cm and the capacitance-voltage hysteresis is negligible. Furthermore, the conduction mechanisms in positively and negatively biased regions are explored by the temperature responses of MOS capacitors. For the positively biased case, the conduction mechanism is shown to be dominated by Schottky emission with an effective barrier height of 1.10±0.12 eV. For the negatively biased case, the gate current is shown to be mainly due to the generation-recombination process in the depletion region. The integration of SiO2 on n-type 4H-SiC by a low thermal budget process is therefore possible. © 2008 The Electrochemical Society. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-46649108014&doi=10.1149%2f1.2938375&partnerID=40&md5=f943f2a2e30e882f5ed992de2897c203 | DOI: | 10.1149/1.2938375 | SDG/關鍵字: | Annealing; Budget control; Capacitance; Capacitors; Dielectric devices; Electric equipment; Energy storage; Gate dielectrics; Gates (transistor); Heat conduction; Mechanisms; Metals; Optical design; Rapid thermal annealing; Rapid thermal processing; Schottky barrier diodes; Semiconducting silicon; Silicon carbide; Silicon compounds; (e ,3e) process; Anodization; Anodization method; Barrier height (BH); Capacitance-voltage hysteresis; Conduction mechanisms; Depletion regions; Electrochemical Society (ECS); gate currents; Generation recombination (GR) process; Interfacial transition layers; Low-thermal-budget; Metal oxide semiconductor (MOS)capacitors; N-type 4H-SiC; Oxide breakdown; Oxide layers; Room-temperature (RT); Schottky emissions; silicon oxides; Temperature responses; MOS capacitors |
顯示於: | 電機工程學系 |
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