https://scholars.lib.ntu.edu.tw/handle/123456789/362396
標題: | A 172.6mW 43.8GFLOPS energy-efficient scalable eight-core 3D graphics processor for mobile multimedia applications | 作者: | Chang, C.-M. Chen, Y.-J. Lu, Y.-C. Lin, C.-Y. Chen, L.-G. Chien, S.-Y. LIANG-GEE CHEN SHAO-YI CHIEN |
公開日期: | 2011 | 起(迄)頁: | 405-408 | 來源出版物: | IEEE Asian Solid-State Circuits Conference, A-SSCC 2011 | 摘要: | A 172.6mW 43.8GFLOPS energy-efficient scalable eight-core 3D graphics processor is designed and implemented for mobile multimedia applications. It is fabricated in 65nm CMOS technology with core size of 7.56mm 2. The buffer bridged scheduler, energy efficient transaction technique and approximated rendering scheme are proposed to efficiently utilize energy to deliver excessive graphics rendering performance of 1.2Gvertices/s and 2.4Gpixels/s for 3D graphics applications. Moreover, configurable filtering unit (CFU) is also employed for accelerating image processing. Compared with state-of-the-art image signal processors (ISPs), 1.1 times to 7.2 times performance can be achieved by the proposed mobile graphics processor with CFU. © 2011 IEEE. |
URI: | http://www.scopus.com/inward/record.url?eid=2-s2.0-84863017330&partnerID=MN8TOARS http://scholars.lib.ntu.edu.tw/handle/123456789/362396 |
DOI: | 10.1109/ASSCC.2011.6123602 | SDG/關鍵字: | 3D graphics; 3D graphics processor; 65nm CMOS technology; Configurable; Core size; Energy efficient; Graphics rendering; Image signal; Mobile graphics; Mobile multimedia applications; CMOS integrated circuits; Energy efficiency; Image processing; Three dimensional; Three dimensional computer graphics |
顯示於: | 電機工程學系 |
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