https://scholars.lib.ntu.edu.tw/handle/123456789/366792
Title: | A 3.6GHz 1MHz-Bandwidth Delta-Sigma Fractional-N PLL with a Quantization-Noise Shifting Architecture in 0.18μm CMOS | Authors: | W.-H. Chiu TSUNG-HSIEN LIN |
Issue Date: | Jun-2011 | Start page/Pages: | 114-115 | Source: | IEEE Symposium on VLSI Circuits | URI: | http://scholars.lib.ntu.edu.tw/handle/123456789/366792 |
Appears in Collections: | 電子工程學研究所 |
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