https://scholars.lib.ntu.edu.tw/handle/123456789/387033
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Tai, H.-Y. | en_US |
dc.contributor.author | Tsai, C.-H. | en_US |
dc.contributor.author | Tsai, P.-Y. | en_US |
dc.contributor.author | Chen, H.-W | en_US |
dc.contributor.author | HSIN-SHU CHEN | en_US |
dc.creator | Tai, H.-Y.;Tsai, C.-H.;Tsai, P.-Y.;Chen, H.-W.;Chen, H.-S. | - |
dc.date.accessioned | 2018-09-10T14:57:27Z | - |
dc.date.available | 2018-09-10T14:57:27Z | - |
dc.date.issued | 2014 | - |
dc.identifier.uri | https://www.scopus.com/inward/record.uri?eid=2-s2.0-84901369744&doi=10.1109%2fTCSII.2014.2312642&partnerID=40&md5=522b9d8d4e7e886408ee56177cf34062 | - |
dc.identifier.uri | http://scholars.lib.ntu.edu.tw/handle/123456789/387033 | - |
dc.description.abstract | This brief presents a single-channel two-step successive approximation register (SAR) analog-to-digital converter (ADC) using a source follower as an interstage residue amplifier. An asynchronous SAR ADC with two-step timing can effectively allocate the bit-resolving procedure into the whole clock period and eliminate a dedicated duty-cycle clock generator. The arbitrary weight capacitor array technique is utilized to tolerate offset mismatch between the coarse and fine stages. The level-shift technique is used to accelerate the comparator. The ADC in 40-nm CMOS obtains 5.6 and 4.9 effective numbers of bits at Nyquist with the conversion rate of 800 MS/s and 1 GS/s, respectively. It consumes 5.3 mW at 1 GS/s and achieves a figure of merit of 180 fJ/conversion-step. The core circuit occupies an area of 0.009 mm2. © 2004-2012 IEEE. | - |
dc.language | en | en |
dc.relation.ispartof | IEEE Transactions on Circuits and Systems II: Express Briefs | en_US |
dc.source | AH-Scopus to ORCID | - |
dc.subject | Analog-to-digital converter (ADC); duty-cycle clock generator; source follower (SF); successive approximation; two-step | - |
dc.title | A 6-bit 1-GS/s Two-Step SAR ADC in 40-nm CMOS | - |
dc.type | journal article | en |
dc.identifier.doi | 10.1109/TCSII.2014.2312642 | - |
dc.identifier.scopus | 2-s2.0-84901369744 | - |
dc.relation.pages | 339-343 | - |
dc.relation.journalvolume | 61 | - |
dc.relation.journalissue | 5 | - |
item.openairetype | journal article | - |
item.fulltext | no fulltext | - |
item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
item.grantfulltext | none | - |
item.cerifentitytype | Publications | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.orcid | 0000-0002-7666-4984 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
顯示於: | 電機工程學系 |
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