https://scholars.lib.ntu.edu.tw/handle/123456789/428190
標題: | LMS-Based Digital Background Linearization Technique for VCO-Based Delta-Sigma ADC | 作者: | F.-C. Huang S.-C. Hsu Y.-L. Tsai Y.-Y. Lin T.-H. Lin TSUNG-HSIEN LIN 林宗賢 |
關鍵字: | digital background calibration; LMS algorithm; VCO nonlinearity; VCO-based ADC | 公開日期: | 2014 | 起(迄)頁: | 202-205 | 來源出版物: | IEEE MWSCAS | 摘要: | This paper presents a digital background linearization technique for VCO-based delta-sigma ADC. The nonlinearity of the VCO in the main ADC is mitigated with the aid of the reference OP-based delta-sigma ADC and the digital least-mean square (LMS) correction algorithm. The reference ADC provides sufficient linearity performance as the calibration reference to form an inverse transfer function of the nonlinear voltage-to-frequency characteristic while the LMS-based calibration scheme shortens the correction time to reduce energy consumption. The simulated SFDR/SNDR of 70.2 dB/62.7 dB over a bandwidth of 10 MHz is achieved, which is 23.3 dB/16.6 dB better than the SFDR/SNDR of uncalibrated ADC. A prototype first-order VCO-based ADC is designed in 90-nm CMOS process and dissipates 2.89 mW from a supply voltage of 1.2 V. © 2014 IEEE. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/428190 | ISSN: | 15483746 | DOI: | 10.1109/mwscas.2014.6908524 | SDG/關鍵字: | Calibration; Energy utilization; Linearization; Variable frequency oscillators; Calibration reference; Digital background calibration; Frequency characteristic; Least mean square (LMS); Linearization technique; LMS algorithms; Reduce energy consumption; Vco based; Analog to digital conversion |
顯示於: | 電子工程學研究所 |
在 IR 系統中的文件,除了特別指名其著作權條款之外,均受到著作權保護,並且保留所有的權利。