https://scholars.lib.ntu.edu.tw/handle/123456789/487767
標題: | Optimizing NAND flash-based SSDs via retention relaxation. | 作者: | Liu, Ren-Shuo CHIA-LIN YANG Wu, Wei |
公開日期: | 2012 | 起(迄)頁: | 11 | 來源出版物: | Proceedings of the 10th USENIX conference on File and Storage Technologies, FAST 2012, San Jose, CA, USA, February 14-17, 2012 | 摘要: | As NAND Flash technology continues to scale down and more bits are stored in a cell, the raw reliability of NAND Flash memories degrades inevitably. To meet the retention capability required for a reliable storage system, we see a trend of longer write latency and more complex ECCs employed in an SSD storage system. These greatly impact the performance of future SSDs. In this paper, we present the first work to improve SSD performance via retention relaxation. NAND Flash is typically required to retain data for 1 to 10 years according to industrial standards. However, we observe that many data are overwritten in hours or days in several popular workloads in datacenters. The gap between the specification guarantee and actual programs' needs can be exploited to improve write speed or ECCs' cost and performance. To exploit this opportunity, we propose a system design that allows data to be written in various latencies or protected by different ECC codes without hampering reliability. Simulation results show that via write speed optimization, we can achieve 1.8-5.7× write response time speedup. We also show that for future SSDs, retention relaxation can bring both performance and cost benefits to the ECC architecture. © 2012 by The USENIX Association. All Rights Reserved. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/487767 https://www.scopus.com/inward/record.uri?eid=2-s2.0-84951953348&partnerID=40&md5=c29b80d40c49a50c60d9f9421b815d7a |
SDG/關鍵字: | Flash-based SSDs; NAND circuits; Cost benefits; Data centers; Industrial standards; NAND Flash; NAND flash memory; Scale down; Storage systems; Write speed; Memory architecture |
顯示於: | 資訊工程學系 |
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