https://scholars.lib.ntu.edu.tw/handle/123456789/497915| Title: | Performance constraints aware voltage Islands generation in SoC floorplan design | Authors: | Lu, M.-C. Wu, M.-C. Chen, H.-M. Jiang, H.-R. HUI-RU JIANG |
Issue Date: | 2007 | Start page/Pages: | 211-214 | Source: | 2006 IEEE International Systems-on-Chip Conference, SOC | URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/497915 | DOI: | 10.1109/SOCC.2006.283883 |
| Appears in Collections: | 電機工程學系 |
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