https://scholars.lib.ntu.edu.tw/handle/123456789/501379
標題: | A 135-mW Fully Integrated Data Processor for Next-Generation Sequencing | 作者: | CHIA-HSIANG YANG Wu, Y.-C. Chang, C.-H. Hung, J.-H. CHIA-HSIANG YANG |
關鍵字: | CMOS digital integrated circuits; DNA mapping; FM-index; Next-generation sequencing (NGS); sBWT algorithm; suffix array sorting | 公開日期: | 2017 | 卷: | 11 | 期: | 6 | 起(迄)頁: | 1216-1225 | 來源出版物: | IEEE Transactions on Biomedical Circuits and Systems | 摘要: | Next-generation sequencing (NGS) enables high-throughput sequencing, in which short DNA fragments can be sequenced in a massively parallel fashion. However, the essential algorithm behind the succeeding NGS data analysis, DNA mapping, is still excessively time consuming. DNA mapping can be partitioned into two parts: suffix array (SA) sorting and backward searching. Dedicated hardware designs for the less-complex backward searching have been proposed, but feasible hardware for the most complicated part, SA sorting, has never been explored. Based on the memory-efficient sBWT algorithm, this work is the first integrated NGS data processor for the entire DNA mapping. The κ-ordered Ferragina and Manzini index used in the sBWT algorithm is leveraged to improve storage capacity and reduce hardware complexity. The proposed NGS data processor realizes the sBWT algorithm through bucket sorting, suffix grouping, and suffix sorting circuits. Key design parameters are analyzed to achieve the optimal performance with respect to hardware cost and execution time. Fabricated in 40-nm CMOS, the NGS data processor dissipates 135 mW at 200 MHz from a 0.9-V supply. With 1-GB external memory, the chip can analyze human DNA within 10 min. This work achieves 43 065 × and 8 971 × [3208 × and 402× ] higher energy efficiency (throughput-to-area ratio) than the high-end CPU and GPU solutions, respectively. © 2007-2012 IEEE. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/501379 | DOI: | 10.1109/TBCAS.2017.2760109 | SDG/關鍵字: | CMOS integrated circuits; Computer hardware; Digital integrated circuits; Digital storage; DNA; Energy efficiency; Gene encoding; Hardware; Mapping; Sorting; Algorithm design and analysis; Arrays; CMOS digital integrated circuits; DNA mapping; FM-index; Indexes; Next-generation sequencing; Sequential analysis; Suffix arrays; Bioinformatics; algorithm; DNA sequence; equipment design; high throughput sequencing; human; procedures; signal processing; software; Algorithms; Equipment Design; High-Throughput Nucleotide Sequencing; Humans; Sequence Analysis, DNA; Signal Processing, Computer-Assisted; Software |
顯示於: | 電機工程學系 |
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