https://scholars.lib.ntu.edu.tw/handle/123456789/505966
DC 欄位 | 值 | 語言 |
---|---|---|
dc.contributor.author | Chiang, K.-Y. | en_US |
dc.contributor.author | Ho, Y.-H. | en_US |
dc.contributor.author | Chen, Y.-W. | en_US |
dc.contributor.author | Pan, C.-S. | en_US |
dc.contributor.author | CHIEN-MO LI | en_US |
dc.creator | Chiang, K.-Y.;Ho, Y.-H.;Chen, Y.-W.;Pan, C.-S.;Li, J.C.-M. | - |
dc.date.accessioned | 2020-06-29T01:20:10Z | - |
dc.date.available | 2020-06-29T01:20:10Z | - |
dc.date.issued | 2015 | - |
dc.identifier.uri | https://scholars.lib.ntu.edu.tw/handle/123456789/505966 | - |
dc.relation.ispartof | Proceedings of the Asian Test Symposium | - |
dc.title | Fault Simulation and Test Pattern Generation for Cross-gate Defects in FinFET Circuits | en_US |
dc.type | conference paper | en |
dc.identifier.doi | 10.1109/ATS.2015.38 | - |
dc.identifier.scopus | 2-s2.0-84963622288 | - |
dc.identifier.url | https://www.scopus.com/inward/record.uri?eid=2-s2.0-84963622288&doi=10.1109%2fATS.2015.38&partnerID=40&md5=095ade071726bed33ff8792a58c5327d | - |
dc.relation.pages | 181-186 | - |
dc.relation.journalvolume | 2016-February | - |
item.openairecristype | http://purl.org/coar/resource_type/c_5794 | - |
item.openairetype | conference paper | - |
item.grantfulltext | none | - |
item.cerifentitytype | Publications | - |
item.fulltext | no fulltext | - |
crisitem.author.dept | Electrical Engineering | - |
crisitem.author.dept | Electronics Engineering | - |
crisitem.author.dept | MediaTek-NTU Research Center | - |
crisitem.author.orcid | 0000-0002-4393-5186 | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | College of Electrical Engineering and Computer Science | - |
crisitem.author.parentorg | Others: University-Level Research Centers | - |
顯示於: | 電機工程學系 |
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