https://scholars.lib.ntu.edu.tw/handle/123456789/581455
標題: | Shaving retries with sentinels for fast read over high-density 3d flash | 作者: | Li Q Ye M Cui Y Shi L Li X Xue C.J. TEI-WEI KUO |
關鍵字: | 3D NAND flash; Read retry; Reliability | 公開日期: | 2020 | 卷: | 2020-October | 起(迄)頁: | 483-495 | 來源出版物: | Proceedings of the Annual International Symposium on Microarchitecture, MICRO | 摘要: | High-density flash-memory chips are under tremendous demands with the exponential growth of data. At the same time, the slow read performance of these high-density flashmemory chips becomes a new challenge. In this work, we analyze the high raw bit error rates (RBER) issue by characterizing the error behaviours of 3D QLC flash-memory chips. A preferred read voltage to a QLC cell could vary among layers and might even change in a short period of time due to the temperature. A sentinel-cell approach is thus proposed to utilize the error characteristics among cells. We propose to infer the optimal read voltages of a wordline based on errors introduced on sentinel cells. An on-line calibration procedure is further presented to resolve the problem of possible non-uniform error distribution on some wordlines. With optimal voltages being inferred, the number of read retries will be significantly reduced. Experiments show that optimal read voltages can be instantly obtained in 94% cases on average over the evaluated QLC flash memory with at most 2 read retries, and with merely 0.2% space overheads for adopting sentinel cells. The number of read retries could be reduced by 82% on average, and the read performance can be improved by 74% on average through a series of extensive experiments over 3D TLC and QLC flash-memory chips. ? 2020 IEEE Computer Society. All rights reserved. |
URI: | https://www.scopus.com/inward/record.uri?eid=2-s2.0-85097348483&doi=10.1109%2fMICRO50266.2020.00048&partnerID=40&md5=d65388ab2c26c0c35fba9a16d083070d https://scholars.lib.ntu.edu.tw/handle/123456789/581455 |
ISSN: | 10724451 | DOI: | 10.1109/MICRO50266.2020.00048 | SDG/關鍵字: | Dynamic random access storage; Errors; Error characteristics; Error distributions; Exponential growth; Flash memory chip; High density flash memory; On-line calibration; Optimal voltages; Raw bit error rates; Flash memory |
顯示於: | 資訊工程學系 |
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