|Title:||A Dual-Phase Center-Aligned 7-Bit Digital Pulsewidth Modulator for Polar Transmitters||Authors:||Kuo, Chien Hung
Yeh, Jian Tzu
Chen, Yi Jan Emery
|Keywords:||Envelope elimination and restoration (EER) | mobile communication | power amplifier | pulse-modulated polar transmitter (PMPT) | pulsewidth modulation (PWM)||Issue Date:||1-Nov-2022||Publisher:||IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC||Journal Volume:||70||Journal Issue:||11||Start page/Pages:||5205||Source:||IEEE Transactions on Microwave Theory and Techniques||Abstract:||
This article presents a dual-phase center-aligned 7-bit digital pulsewidth modulator for the envelope modulation of pulse-modulated polar transmitters (PMPTs). The digital pulsewidth modulator operates at a clock frequency and delivers the modulation frequency of 100 MHz. A delay-locked loop (DLL) consisting of 128 delay cells is used to generate the pulse edges for synthesis of center-aligned pulsewidth modulation (PWM) waveforms. The pulsewidth resolution is 78.1 ps. The measurement results show that the integral nonlinearity (INL) and differential nonlinearity (DNL) of the output pulses are within ±0.4 and ±0.3 LSB, respectively, in the duty cycle range of 2.12%-96.51%. Tested with a 20-MHz 256-quadrature-amplitude modulation (QAM) 5G new radio (NR) signal, the transmitter signal using the output of the modulator achieves the adjacent channel leakage ratio (ACLR) of -33.8 dBc.
|Appears in Collections:||工程科學及海洋工程學系|
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