https://scholars.lib.ntu.edu.tw/handle/123456789/633677
標題: | Exploring Synchronous Page Fault Handling | 作者: | Chen, Yin Chiuan Wu, Chun Feng Chang, Yuan Hao TEI-WEI KUO |
關鍵字: | Context switch | data prefetching | killer microsecond | page faults | process scheduler | synchronous I/O completion designs | ultralow-latency (ULL) devices | 公開日期: | 1-十一月-2022 | 出版社: | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | 卷: | 41 | 期: | 11 | 起(迄)頁: | 3791 | 來源出版物: | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 摘要: | The advance of nonvolatile memory in storage technology has presented challenges in redefining the ways in handling the main memory and the storage. This work is motivated by the strong demands in effective handling of page faults over ultralow-latency storage devices. In particular, we propose synchronous and asynchronous prefetching strategies to satisfy process executions with different memory demands in supporting of synchronous page fault handling. An adaptive CPU scheduling strategy is also proposed to cope with the needs of processes in maintaining their working sets in the main memory. Six representative benchmarks and applications were evaluated. It was shown that our strategy can effectively save 12.33% of the total execution time and reduce 13.33% of page faults, compared to the conventional demand paging strategy with nearly no sacrificing of process fairness. |
URI: | https://scholars.lib.ntu.edu.tw/handle/123456789/633677 | ISSN: | 02780070 | DOI: | 10.1109/TCAD.2022.3197517 |
顯示於: | 資訊工程學系 |
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