公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2004 | A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator | Liu, Tsung-Te ; Wang, Chorng-Kuang | 30th European Solid-State Circuits Conference, 2004. ESSCIRC 2004 | 0 | 0 | |
2004 | A 0.8-8 GHz 9.7 mW analog-digital dual-loop adaptive-bandwidth DLL based multi-phase clock generator | Liu, T.-T.; Wang, C.-K.; TSUNG-TE LIU | ESSCIRC 2004 - Proceedings of the 30th European Solid-State Circuits Conference | 1 | | |
2006 | A 0.9mW 0.01-1.4GHz wideband CMOS low noise amplifier for low-band ultra wideband applications | Liu, T.-T.; Wang, C.-K.; TSUNG-TE LIU | 2005 IEEE Asian Solid-State Circuits Conference, ASSCC 2005 | 10 | 0 | |
2004 | A 14 GHz DLL based low-jitter multi-phase clock generator for low-band ultra-wideband application | Liu, Tsung-Te ; Wang, Chorng-Kuang | Advanced System Integrated Circuits 2004 | 0 | 0 | |
2020 | A 270-mV 6T SRAM Using Row-Based Dual-Phase VDDControl in 28-nm CMOS | Lu C.-H; Hsu Y.-T; Wu B.-C; TSUNG-TE LIU | IEEE Transactions on Circuits and Systems I: Regular Papers | 3 | 2 | |
2012 | A 0.25V 460nW Asynchronous Neural Signal Processor with Inherent Leakage Suppression | T.-T. Liu; J. Rabaey; TSUNG-TE LIU | IEEE Symposium on VLSI Circuits | 4 | 0 | |
2013 | A 0.25V 460nW Asynchronous Neural Signal Processor with Inherent Leakage Suppression | Liu, T.-T.; Rabaey, J.M.; TSUNG-TE LIU | IEEE Journal of Solid-State Circuits | 4 | 29 | |
2011 | A Low-Leakage Parallel CRC Generator for Ultra-Low Power Applications | L. Alarcó n, T.-T. Liu; J. Rabaey; TSUNG-TE LIU | 2011 IEEE International Symposium on Circuits and Systems (ISCAS’11) | 1 | 0 | |
2012 | Active RFID: Perpetual Wireless Communications Platform for Sensors | J. Richmond; M. John; L. Alarcó n; W. Zhou; W. Li; T.-T. Liu; M. Alioto; S. S; ers; J. Rabaey; TSUNG-TE LIU | 38th European Solid-State Circuits Conference, 2012. (ESSCIRC’12) | 13 | 0 | |
2015 | An Energy-Efficient Resilient Flip-Flop Circuit with Built-In Timing-Error Detection and Correction | J. M. Huang; T. T. Liu; T. D. Chiueh; TZI-DAR CHIUEH ; TSUNG-TE LIU | IEEE VLSI-DAT | 15 | 0 | |
2008 | Asynchronous Computing in Sense Amplifier-based Pass Transistor Logic | T.-T. Liu, L. Alarcó n, M. Pierson,; J. Rabaey; TSUNG-TE LIU | 14th IEEE International Symposium on Asynchronous Circuits and Systems | 4 | 16 | |
2009 | Asynchronous Computing in Sense Amplifier-based Pass Transistor Logic | T.-T. Liu, L. Alarcó n, M. Pierson,; J. Rabaey; TSUNG-TE LIU | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 20 | 16 | |
2022 | CIM-Based Smart Pose Detection Sensors | Chou J.-J; Chang T.-W; Liu X.-Y; Wu T.-Y; Chen Y.-K; Hsu Y.-T; Chen C.-W; TSUNG-TE LIU ; CHI-SHENG SHIH | Sensors | 1 | 1 | |
2018 | Circuit sensing techniques in magnetoresistive random-access memory | Wu, B.-C.; TSUNG-TE LIU | Journal of Low Power Electronics | 1 | 0 | |
2021 | Clock-Less DFT and BIST for Dual-Rail Asynchronous Circuits | Chen T.-C; Pai C.-C; Hsieh Y.-Z; Tseng H.-Y; Chien-Mo J; Liu T.-T; CHIEN-MO LI ; TSUNG-TE LIU ; Chiu I.-W | Journal of Electronic Testing: Theory and Applications (JETTA) | 0 | 0 | |
2022 | D-NAT: Data-Driven Non-Ideality Aware Training Framework for Fabricated Computing-In-Memory Macros | Lin M.-G; Huang C.-T; Chuang Y.-C; Chen Y.-T; Hsu Y.-T; Chen Y.-K; Chou J.-J; TSUNG-TE LIU ; CHI-SHENG SHIH ; AN-YEU(ANDY) WU | IEEE Journal on Emerging and Selected Topics in Circuits and Systems | 2 | 2 | |
2021 | Deep Neural Network to Differentiate Brain Activity Between Patients With First-Episode Schizophrenia and Healthy Individuals: A Multi-Channel Near Infrared Spectroscopy Study | Chou P.-H; Yao Y.-H; Zheng R.-X; Liou Y.-L; Liu T.-T; Lane H.-Y; Yang A.C; Wang S.-C.; TSUNG-TE LIU | Frontiers in Psychiatry | 12 | 11 | |
2014 | Design Technology Co-optimization for N10 | TSUNG-TE LIU | IEEE Proceedings of the Custom Integrated Circuits Conference (CICC’14) | | | |
2016 | Dynamic Reconfigurable Ternary Content Addressable Memory for OpenFlow-Compliant Low-Power Packet Processing | T.-S. Chen; D.-Y. Lee; T.-T. Liu; A.-Y. Wu; TSUNG-TE LIU | IEEE Transactions on Circuits and Systems I: Regular Papers | 26 | 21 | |
2020 | ECC processor over the Koblitz curves with τ-NAF Converter and Square-Square-Add Algorithm | Wang T; TSUNG-TE LIU | Proceedings of 2020 IEEE Asia Pacific Conference on Circuits and Systems, APCCAS 2020 | 0 | 0 | |