公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2002 | Image rejection relaxed 5GHz CMOS receiver front-end | Chia-Hsin Wu; Chih-Chun Tang; Shen-Iuan Liu; SHEN-IUAN LIU | 2002 VLSI/CAD | | | |
2020 | An Indoor Photovoltaic Energy Harvester Using Time-Based MPPT and On-Chip Photovoltaic Cell | Chang M.-C; Liu S.-I.; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems II: Express Briefs | 25 | 21 | |
2012 | Inductorless wideband CMOS low-noise amplifiers using noise-canceling technique | Ke-Hou Chen; Shen-Iuan Liu; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems I: Regular Papers | 112 | 89 | |
1996 | Insensitive current/voltage-mode filters using FTFNs | SHEN-IUAN LIU ; Lee, J.-L. | Electronics Letters | 58 | 58 | |
2001 | Integrator and differentiator with time constant multiplication Using a current feedback amplifier | Jiin-Long Lee; Shen-Iuan Liu; SHEN-IUAN LIU | Electronics Letters | 31 | 25 | |
2008 | Introduction to the Special Issue on the 2008 IEEE International Solid-State Circuits Conference | Tsukamoto, Sanroku; SHEN-IUAN LIU ; Heinen, Stefan; Thewes, Roland; JRI LEE | Ieee Journal of Solid-State Circuits | 0 | 0 | |
2012 | Introduction to the special section on the 2011 Asian solid-state circuits conference (A-SSCC) | Liu, S.-I.; Lin, T.-H.; TSUNG-HSIEN LIN ; SHEN-IUAN LIU | IEEE Journal of Solid-State Circuits | 0 | 0 | |
2021 | A Jitter-Tolerance-Enhanced Digital CDR Circuit Using Background Loop Gain Controller | Yao Y.-S; Huang C.-C; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems II: Express Briefs | 0 | 0 | |
2009 | A leakage-compensated PLL in 65-nm CMOS technology | Hung, C.-C.; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems II: Express Briefs | 20 | 17 | |
1995 | Linear transformation all-pole filters based on current conveyors | Hwang, Y.-S.; Liu, S.-I.; Wu, D.-S.; Wu, Y.-P.; SHEN-IUAN LIU | International Journal of Electronics | 6 | 2 | |
2009 | Loop latency reduction technique for all-digital clock and data recovery circuits | I-Fong Chen; Rong-Jyi Yang; Shen-Iuan Liu; SHEN-IUAN LIU | IEEE Asian Solid-State Circuits Conference | 7 | 0 | |
2004 | Low jitter and multi-rate clock and data recovery circuit using a MSADLL for chip-to-chip interconnection | Hsiang-Hui Chang; Rong-Jyi Yang; Shen-Iuan Liu; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems I: Regular Papers | 21 | 12 | |
2003 | Low jitter Butterworth delay-locked loops | Chang, Hsiang-Hui; Sun, Chih-Hao; Liu, Shen-Iuan | 2003 Symposium on VLSI Circuits | 3 | 0 | |
2004 | Low voltage and low power CMOS exponential-control variable-gain amplifier | Weihsing Liu; Shen-Iuan Liu; Shui-Ken Wei; SHEN-IUAN LIU | IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences | 4 | 4 | |
1994 | Low voltage CMOS four-quadrant multiplier | SHEN-IUAN LIU | Electronics Letters | 37 | 33 | |
2001 | Low voltage CMOS low noise amplifier using the planar interleaved transformer | Chih-Chun Tang; Shen-Iuan Liu; SHEN-IUAN LIU | Electronics Letters | 19 | 17 | |
0 | Low voltage Pipelined Analog-to-Digital Converter | ¼B²`²W; SHEN-IUAN LIU | | | | |
2015 | A low-input-swing AC-DC voltage multiplier using Schottky diodes | Luo, Y.-S.; Liu, S.-I.; SHEN-IUAN LIU | Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 | 1 | 0 | |
2002 | Low-jitter DLLs with the butterworth characteristics | Lan-Cho Chou; Chih-Hao Sun; Shen-Iuan Liu; SHEN-IUAN LIU | 2002 VLSI/CAD | | | |
2022 | A Low-Jitter Sub-Sampling PLL With a Sub-Sampling DLL | Qian Y.C; Chao Y.Y; SHEN-IUAN LIU | IEEE Transactions on Circuits and Systems II: Express Briefs | 5 | 9 | |