公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2013 | A robust constraint solving framework for multiple constraint sets in constrained random verification | Wu, B.-H.; CHUNG-YANG HUANG | Proceedings - Design Automation Conference | | | |
2012 | A robust general constrained random pattern generator for constraints with variable ordering. | Wu, Bo-Han; CHUNG-YANG HUANG | 2012 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2012, San Jose, CA, USA, November 5-8, 2012 | | | |
2009 | SAT-controlled redundancy addition and removal: a novel circuit restructuring technique | Wu, Chi-An; Lin, Ting-Hao; Huang, Shao-Lun; Huang, Chung-Yang | Asia and South Pacific Design Automation Conference, 2009. ASP-DAC | 7 | 0 | |
2007 | Scalable Exploration of Functional Dependency by Interpolation and Incremental SAT Solving | Chih-Chun Lee; Jie-Hong R. Jiang; Chung-Yang Huang; Alan Mishchenko; CHUNG-YANG HUANG ; JIE-HONG JIANG | IEEE/ACM Int'l Conf. on Computer-Aided Design (ICCAD'07) | | | |
2012 | A semi-formal min-cost buffer insertion technique considering multi-mode multi-corner timing constraints | Tsai, S.-H.; Li, M.-Y.; CHUNG-YANG HUANG | Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC | | | |
2011 | SoC HW/SW Verification and Validation | CHUNG-YANG HUANG ; Yu-Fan Yin; Chih-Jen Hsu; Thomas B. Huang; Ting-Mao Chang | ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC) | 39 | 0 | |
2006 | Solving Constraint Satisfiability Problem For Automatic Generation of Design Verification Vectors | CHUNG-YANG HUANG | | | | |
1999 | Solving Constraint Satisfiability Problem for Automatic Generation of Design Verification Vectors | R.C.-Y. Huang; K.-T. Cheng; CHUNG-YANG HUANG | International High Level Design Validation and Test Workshop | | | |
2011 | Speeding Up MPSoC Virtual Platform Simulation by Ultra Synchronization Checking Method | Yu-Fu Yeh; Chung-Yang (Ric) Huang; Chi-An Wu; Hsin-Cheng Lin; CHUNG-YANG HUANG | ACM/IEEE Design, Automation, and Test in Europe (DATE) conference | | | |
2011 | Speeding Up MPSoC virtual platform simulation by Ultra Synchronization Checking Method. | Yeh, Yu-Fu; Huang, Chung-Yang; Wu, Chi-An; Lin, Hsin-Cheng; CHUNG-YANG HUANG | Design, Automation and Test in Europe, DATE 2011, Grenoble, France, March 14-18, 2011 | | | |
2008 | Speeding Up SoC Virtual Platform Simulation by Data-Dependency Aware Virtual Synchronization | Kuen-Huei Lin; Siao-Jie Cai Huang; CHUNG-YANG HUANG | International SoC Design Conference (ISoCC) | | | |
2010 | Speeding Up SoC Virtual Platform Simulation by Data-Dependency-Aware Synchronization and Scheduling | Kuen-Huei Lin; Siao-Jie Cai; CHUNG-YANG HUANG | ACM/IEEE Asia and South Pacific Design Automation Conference (ASP-DAC) | | | |
2000 | Static property checking using ATPG vs. BDD techniques. | Huang, Chung-Yang; Yang, Bwolen; Tsai, Huan-Chih; Cheng, Kwang-Ting; CHUNG-YANG HUANG | Proceedings IEEE International Test Conference 2000, Atlantic City, NJ, USA, October 2000 | | | |
2012 | Symbolic model checking on SystemC designs | Chou, C.-N.; Ho, Y.-S.; Hsieh, C.; CHUNG-YANG HUANG | Proceedings - Design Automation Conference | | | |
2010 | To SAT or Not to SAT: Scalable Exploration of Functional Dependency | Jie-Hong R. Jiang; Chih-Chun Lee; Alan Mishchenko; CHUNG-YANG HUANG ; JIE-HONG JIANG | IEEE Transactions on Computers (TCOMP) | | | |
2011 | Toward an extremely-high-throughput and even-distribution pattern generator for the constrained random simulation techniques | Wu, B.-H.; Yang, C.-J.; Tso, C.-C.; CHUNG-YANG HUANG | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | | | |
2013 | An ultrasynchronization checking method with trace-driven simulation for fast and accurate MPSoC virtual platform simulation | Yeh, Y.-F.; Lin, H.-C.; CHUNG-YANG HUANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | | | |
2011 | Using SAT-based Craig interpolation to enlarge clock gating functions. | Lin, Ting-Hao; CHUNG-YANG HUANG | Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011 | | | |
2001 | Using Word-Level ATPG and Modular Arithmetic Constraint-Solving Techniques for Assertion Property Checking | R.C.-Y. Huang; K.-T. Cheng; CHUNG-YANG HUANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | | | |
2007 | 兆級晶片系統前瞻技術研究-子計畫七:兆級晶片系統模擬與正規驗證之整合技術(2/3) | 黃鐘揚 | | | | |