公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2005 | Design and Analysis of a 20-GHz Clock Multiplication Unit in 0.18-μm CMOS Technology | Jri Lee; Shanghann Wu; JRI LEE | Symposium on VLSI Circuits | 4 | 0 | |
2008 | Design and comparison of three 20-Gb/s backplane transceivers for duobinary, PAM4, and NRZ data | JRI LEE ; Chen, M.-S.; Wang, H.-D. | IEEE Journal of Solid-State Circuits | 122 | 105 | |
2015 | Design of 56 Gb/s NRZ and PAM4 SerDes transceivers in CMOS technologies | Lee, J.; Chiang, P.-C.; Peng, P.-J.; Chen, L.-Y.; Weng, C.-C.; JRI LEE | IEEE Journal of Solid-State Circuits | | | |
1998 | Design of spiral inductors on silicon substrates with a fast simulator | Lee, J.; Kral, A.; Abidi, A.A.; Alexopoulos, N.G.; JRI LEE | European Solid-State Circuits Conference | | | |
1998 | Efficient frequency conversion apparatus for use with nultimode solid-state lasers | rew Kung; Jri Lee; JRI LEE | | | | |
2010 | A fully integrated 77GHz FMCW radar system in 65nm CMOS | Li, Y.-A.; Hung, M.-H.; Huang, S.-J.; JRI LEE | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | | | |
2015 | Fully-integrated 40-Gb/s pulse pattern generator and bit-error-rate tester chipsets in 65-nm CMOS technology | Chen, G.-S.; Wu, C.-Y.; Lin, C.-L.; Hung, H.-W.; JRI LEE | Proceedings - 2014 IEEE Asian Solid-State Circuits Conference, A-SSCC 2014 | | | |
2012 | A fully-integrated 40-Gb/s transceiver in 65-nm CMOS technology | Chen, M.-S.; Shih, Y.-N.; Lin, C.-L.; Hung, H.-W.; JRI LEE | IEEE Journal of Solid-State Circuits | | | |
2010 | A Fully-Integrated 77-GHz FMCW Radar Transceiver in 65-nm CMOS Technology | Lee, Jri; Li, Yi-An; Hung, Meng-Hsiung; Huang, Shih-Jou; JRI LEE | Ieee Journal of Solid-State Circuits | | 243 | |
2013 | A Fully-Integrated 77GHz phase-array radar system with 1TX/4RX frontend and digital beamforming technique | Huang, S.-J.; Chen, Y.-L.; Chu, H.-Y.; Chen, P.-N.; Chang, H.-Y.; Kuo, C.-Y.; Kao, C.; JRI LEE | IEEE Symposium on VLSI Circuits, Digest of Technical Papers | | | |
2007 | Gigabit CDRs and equalizers | Stonick, J.T.; JRI LEE | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | | | |
2006 | High-Speed Circuit Designs for Transmitters in Broadband Data Links | JRI LEE | IEEE Journal of Solid-State Circuits | 23 | 19 | |
2007 | High-speed clock and data recovery circuit | Jri Lee; Behzad Razavi; JRI LEE | | | | |
2008 | Introduction to the Special Issue on the 2008 IEEE International Solid-State Circuits Conference | Tsukamoto, Sanroku; SHEN-IUAN LIU ; Heinen, Stefan; Thewes, Roland; JRI LEE | Ieee Journal of Solid-State Circuits | 0 | 0 | |
2009 | A low-power fully integrated 60ghz transceiver system with OOK modulation and on-board antenna assembly | Lee, J.; Huang, Y.; Chen, Y.; Lu, H.; HSIN-CHIA LU ; JRI LEE | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | 104 | 0 | |
2010 | A low-power low-cost fully-integrated 60-GHz transceiver system with OOK modulation and on-board antenna assembly | Lee, J.; Chen, Y.; Huang, Y.; JRI LEE | IEEE Journal of Solid-State Circuits | | | |
2008 | mm-Wave Silicon Technology: 60GHz and Beyond (Chapter 5: Voltage-Controlled Oscillators and Frequency Dividers) | JRI LEE | | | | |
2003 | Modeling of Jitter in Bang-Bang Clock and Data Recovery Circuits | Jri Lee; Ken Kundert; Behzad Razavi; JRI LEE | Custom Integrated Circuits Conference | 20 | 0 | |
2009 | Study of Subharmonically Injection-Locked PLLs | Lee, Jri; Wang, Huaide; JRI LEE | Ieee Journal of Solid-State Circuits | | 142 | |
2009 | Subharmonically injection-locked PLLS for ultra-low-noise clock generation | Lee, J.; Wang, H.; Chen, W.-T.; Lee, Y.-P.; JRI LEE | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | | | |