公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2016 | Energy Recycling Systems and Recycling Method Thereof | C.-H. Yang; P.-H. Hsieh; C.-Y. Lee; CHIA-HSIANG YANG | | | | |
2023 | An Energy-Efficient Double Ratchet Cryptographic Processor With Backward Secrecy for IoT Devices | Yu, Sheng Jung; Lee, Yu Chi; Lin, Liang Hsin; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 0 | 0 | |
2016 | Error-resilient sequential cells with successive time borrowing for stochastic computing | Liu, W.-C.; Chan, C.-D.; Huang, S.-A.; Lo, C.-W.; Yang, C.-H.; Jou, S.-J.; CHIA-HSIANG YANG | ICASSP, IEEE International Conference on Acoustics, Speech and Signal Processing | 0 | 0 | |
2017 | Extreme index finder and finding method thereof | M.-R. Li; C.-H. Yang; Y.-L. Ueng; CHIA-HSIANG YANG | | | | |
2017 | A Flexible Geometric Mean Decomposition Processor for MIMO Communication Systems | Y.-C. Tsai; C.-E. Chen; C.-H. Yang; CHIA-HSIANG YANG | IEEE Transaction on Circuits & Systems I (TCAS-I) | 5 | 5 | |
2023 | An FM-index Based High-Throughput Memory-Efficient FPGA Accelerator for Paired-end Short-read Mapping | Yang, Chung Hsuan; Wu, Yi Chung; Chen, Yen Lung; Lee, Chao Hsi; Hung, Jui Hung; CHIA-HSIANG YANG | IEEE Transactions on Biomedical Circuits and Systems | 0 | 0 | |
2023 | A Fully Integrated End-to-End Genome Analysis Accelerator for Next-Generation Sequencing | Chen, Yen Lung; Yang, Chung Hsuan; Wu, Yi Chung; Lee, Chao Hsi; Chen, Wen Ching; Lin, Liang Yi; Chang, Nian Shyang; CHUN-PIN LIN; Chen, Chi Shi; Hung, Jui Hung; CHIA-HSIANG YANG | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | 0 | 0 | |
2020 | A Fully Integrated Genetic Variant Discovery SoC for Next-Generation Sequencing | Wu, Y.-C.; Chen, Y.-L.; Yang, C.-H.; Lee, C.-H.; Yu, C.-Y.; Chang, N.-S.; Chen, L.-C.; Chang, J.-R.; Lin, C.-P.; Chen, H.-L.; Chen, C.-S.; Hung, J.-H.; Yang, C.-H.; CHIA-HSIANG YANG | Digest of Technical Papers - IEEE International Solid-State Circuits Conference | 6 | 0 | |
2022 | Hardware Acceleration in Large-Scale Tensor Decomposition for Neural Network Compression | Kao, Chen Chien; Hsieh, Yi Yen; Chen, Chao Hung; CHIA-HSIANG YANG | Midwest Symposium on Circuits and Systems | 1 | 0 | |
2019 | A Hardware-Efficient ADMM-Based SVM Training Algorithm for Edge Computing. | Huang, Shuo-An; Yang, Chia-Hsiang; CHIA-HSIANG YANG | CoRR | | | |
2012 | Hardware-efficient EVD processor architecture in FastICA for epileptic seizure detection | Shih, Y.-H.; Chen, T.-J.; Yang, C.-H.; Chiueh, H.; CHIA-HSIANG YANG | 2012 Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA ASC 2012 | | | |
2012 | Hardware-efficient EVD processor architecture in FastICA for epileptic seizure detection. | Shih, Yi-Hsin; Chen, Tsan-Jieh; Yang, Chia-Hsiang; Chiueh, Herming; CHIA-HSIANG YANG | Asia-Pacific Signal and Information Processing Association Annual Summit and Conference, APSIPA 2012, Hollywood, CA, USA, December 3-6, 2012 | | | |
2018 | A Hardware-Scalable DSP Architecture for Beam Selection in mm-Wave MU-MIMO Systems | C.-Y. Yeh; T.-C. Chu; C.-E. Chen; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Paper | 3 | 3 | |
2021 | A High-Throughput FPGA Accelerator for Short-Read Mapping of the Whole Human Genome | Chen Y.-L; Chang B.-Y; CHIA-HSIANG YANG ; TZI-DAR CHIUEH | IEEE Transactions on Parallel and Distributed Systems | 8 | 15 | |
2021 | Hybrid Precoding Baseband Processor for 64x 64 Millimeter Wave MIMO Systems | Kao C; Chen C; Yang C.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 3 | 3 | |
2020 | Improved design and in vivo animal tests of bone-guided cochlear implant microsystem with monopolar biphasic multiple stimulation and neural action potential acquisition | Wang S.-H; Huang Y.-K; Chen C.-Y; Lee C.-F; Yang C.-H; Hung C.-C; Liu C.-H; Ker M.-D; CHIEN-HAO LIU ; CHIA-HSIANG YANG | 2020 IEEE Asian Solid-State Circuits Conference, A-SSCC 2020 | 3 | 0 | |
2019 | An integrated message-passing detector and decoder for polar-coded massive MU-MIMO systems | Chen, Y.-T.; Sun, W.-C.; Cheng, C.-C.; Tsai, T.-L.; Ueng, Y.-L.; Yang, C.-H.; CHIA-HSIANG YANG | IEEE Transactions on Circuits and Systems I: Regular Papers | 22 | 19 | |
2017 | Integration of Energy-Recycling Logic and Wireless Power Transfer for Ultra-Low-Power Implantables | H.-T. Lin; Y.-C. Wu; P.-H. Hsieh; C.-H. Yang; CHIA-HSIANG YANG | Int. Symposium Circuits and Systems (ISCAS) | 1 | 0 | |
2018 | Introduction to the Special Section on the 2017 Asian Solid-State Circuits Conference (A-SSCC) | Lin, T.-H.; Yang, C.-H.; TSUNG-HSIEN LIN ; CHIA-HSIANG YANG | IEEE Journal of Solid-State Circuits | 0 | 0 | |
2019 | Iterative Inter-Cell Interference Cancellation Receiver for LDPC-Coded MIMO Systems | Sun, W.-C.; Chen, Y.-T.; Yang, C.-H.; Ueng, Y.-L.; CHIA-HSIANG YANG | IEEE Transactions on Signal Processing | 1 | 1 | |