公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2017 | Pool-boiling heat-transfer enhancement on cylindrical surfaces with hybrid wettable patterns | Kumar C. S.; S.; Chang, Y.W.; PING-HEI CHEN ; YAO-WEN CHANG | Journal of Visualized Experiments | 16 | 12 | |
2009 | Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs | Lee, W.-P.; Marculescu, D.; Chang, Y.-W.; YAO-WEN CHANG | International Symposium on Physical Design | 10 | 0 | |
2007 | Power/Ground Network and Floorplan Cosynthesis for Fast Design Convergence | Liu, Chen-Wei; Chang, Yao-Wen | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | | 13 | |
2007 | Power/ground network and floorplan cosynthesis for fast design convergence | Liu, C.-W.; Chang, Y.-W.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 19 | 13 | |
2010 | Predictive formulae for OPC with applications to lithography-friendly routing | Chen, T.-C.; Liao, G.-W.; Chang, Y.-W.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 13 | 9 | |
2008 | Predictive formulae for OPC with applications to lithography-friendly routing | Chen, T.-C.; Liao, G.-W.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 20 | 0 | |
2008 | Predictive formulae for OPC with applications to lithography-friendly routing. | Chen, Tai-Chen; Liao, Guang-Wan; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008 | 0 | 0 | |
2011 | PRICE: Power reduction by placement and clock-network co-synthesis for pulsed-latch designs | Chuang, Y.-L.; Lin, H.-T.; Ho, T.-Y.; Chang, Y.-W.; Marculescu, D.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 7 | 0 | |
2010 | Proceedings of the 2010 International Symposium on Physical Design, ISPD 2010, San Francisco, California, USA, March 14-17, 2010 | YAO-WEN CHANG | | | | |
2011 | Proceedings of the 2011 International Symposium on Physical Design, ISPD 2011, Santa Barbara, California, USA, March 27-30, 2011 | YAO-WEN CHANG | | | | |
2011 | Proceedings of the International Symposium on Physical Design: Foreword | Chang, Y.-W.; Hu, J.; YAO-WEN CHANG | International Symposium on Physical Design | 0 | | |
2008 | A progressive-ILP based routing algorithm for cross-referencing biochips. | Yuh, Ping-Hung; Sapatnekar, Sachin S.; Yang, Chia-Lin; CHIA-LIN YANG ; YAO-WEN CHANG | Proceedings of the 45th Design Automation Conference, DAC 2008, Anaheim, CA, USA, June 8-13, 2008 | 0 | 0 | |
2007 | A Provably Good Approximation Algorithm for Power Optimization Using Multiple Supply Voltages. | Liu, Hung-Yi; Lee, Wan-Ping; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 44th Design Automation Conference, DAC 2007, San Diego, CA, USA, June 4-8, 2007 | 0 | 0 | |
2016 | Provably good max-min-m-neighbor-TSP-based subfield scheduling for electron-beam photomask fabrication | Lin, Z.-W.; Fang, S.-Y.; Chang, Y.-W. ; Rao, W.-C.; CHIEH-HSIUNG KUAN ; YAO-WEN CHANG | 2015 IEEE/ACM International Conference on Computer-Aided Design, ICCAD 2015 | 1 | 0 | |
2018 | Provably good max–min-m-neighbor-TSP-based subfield scheduling for electron-beam photomask fabrication | Lin Z.-W; Fang S.-Y; Chang Y.-W; Rao W.-C; CHIEH-HSIUNG KUAN ; Chang, Y.-W. | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 2 | 2 | |
2020 | A provably good wavelength-division-multiplexing-aware clustering algorithm for on-chip optical routing | Lu, Y.-S.; Yu, S.-J.; YAO-WEN CHANG | Proceedings - Design Automation Conference | 6 | 0 | |
2023 | PUFFER: A Routability-Driven Placement Framework via Cell Padding with Multiple Features and Strategy Exploration | Cai, Zhijie; Zou, Peng; Wu, Zhengtao; Tong, Xingyu; Yu, Jun; Chen, Jianli; YAO-WEN CHANG | Proceedings - Design Automation Conference | 0 | 0 | |
2011 | Pulsed-latch aware placement for timing-integrity optimization | Chuang, Y.-L.; Kim, S.; Shin, Y.; Chang, Y.-W.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 3 | 1 | |
2010 | Pulsed-latch aware placement for timing-integrity optimization | Chuang, Y.-L.; Kim, S.; Shin, Y.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 20 | 0 | |
2016 | QB-trees: Towards an optimal topological representation and its applications to analog layout designs | Wu, I.-P.; Ou, H.-C.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 12 | 0 | |