公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2012 | Timing ECO optimization using metal-configurable gate-array spare cells | Chang, H.-Y.; Jiang, I.H.-R.; YAO-WEN CHANG ; HUI-RU JIANG | Proceedings - Design Automation Conference | 4 | 0 | |
2011 | Timing ECO optimization via B?zier curve smoothing and fixability identification | Chang, H.-Y.; Jiang, I.H.-R.; YAO-WEN CHANG ; HUI-RU JIANG | IEEE/ACM International Conference on Computer-Aided Design | 2 | 0 | |
2012 | Timing ECO optimization via B?zier curve smoothing and fixability identification | Chang, H.-Y.; Jiang, I.H.-R.; YAO-WEN CHANG ; HUI-RU JIANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 11 | 9 | |
2004 | Timing modeling and optimization under the transmission line model | Chen, Tai-Chen; Pan, Song-Ra; Chang, Yao-Wen | IEEE Transactions on | 32 | 27 | |
2021 | Timing-Aware Fill Insertions with Design-Rule and Density Constraints | Bai X; Zhu Z; Li P; Chen J; Lan T; Li X; Yu J; Zhu W; Chang Y.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 0 | 0 | |
2019 | Timing-aware fill insertions with design-rule and density constraints | Lan T; Li X; Chen J; Yu J; He L; Dong S; Zhu W; Chang Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 2 | 0 | |
2016 | Timing-Driven Cell Placement Optimization for Early Slack Histogram Compression | C. C. Huang; Y. C. Liu; Y. S. Lu; Y. C. Kuo; Y. W. Chang; S. Y. Kuo; SY-YEN KUO ; YAO-WEN CHANG | 53th ACM/IEEE Design Automation Conference (DAC-2016) | 9 | 0 | |
2000 | Timing-driven routing for symmetrical array-based FPGAs | Zhu, K.; Wong, D.F.; YAO-WEN CHANG | ACM Transactions on Design Automation of Electronic Systems | 23 | 20 | |
1998 | Timing-driven routing for symmetrical-array-based FPGAs | Zhu, Kai; Chang, Yao-Wen; Wong, D.F.; YAO-WEN CHANG | IEEE International Conference on Computer Design: VLSI in Computers and Processors | 10 | | |
2000 | Timing-driven routing for symmetrical-array-based FPGAs | CHANG, YAO-WEN ; ZHU, KAI; WONG, D. F. | ACM Transactions on Design Automation of Electronic Systems | | | |
1998 | Timing-driven routing for symmetrical-array-based FPGAs. | Zhu, Kai; Chang, Yao-Wen; Wong, D. F.; YAO-WEN CHANG | International Conference on Computer Design: VLSI in Computers and Processors, ICCD 1998, Proceedings, 5-7 October, 1998, Austin, TX, USA | 10 | 0 | |
2021 | Topological Structure and Physical Layout Co-design for Wavelength-Routed Optical Networks-on-Chip | Lu Y; Chen Y; Yu S; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 2 | 2 | |
2020 | Topological structure and physical layout codesign for wavelength-routed optical networks-on-chip | Lu, Y.-S.; Yu, S.-J.; YAO-WEN CHANG | Proceedings - Design Automation Conference | 6 | 0 | |
2017 | Toward Optimal Legalization for Mixed-Cell-Height Circuit Designs | Chen, J.; Zhu, Z.; Zhu, W.; Chang, Y.-W. | Design Automation Conference | 38 | 0 | |
2023 | Toward Parallelism-Optimal Topology Generation for Wavelength-Routed Optical NoC Designs | Chen, Kuan Cheng; Chen, Yan Lin; Lu, Yu Sheng; YAO-WEN CHANG | Proceedings - Design Automation Conference | 0 | 0 | |
2022 | Transitive closure graph-based warpage-aware floorplanning for package designs | Hsu, Yang; Chung, Min Hsuan; YAO-WEN CHANG ; Lin, Ci Hong | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 0 | 0 | |
2010 | TRECO: Dynamic Technology Remapping for Timing Engineering Change Orders | Kuan-Hsien Ho; Jie-Hong R. Jiang; Yao-Wen Chang; YAO-WEN CHANG ; JIE-HONG JIANG | Asia and South Pacific Design Automation Conference (ASP-DAC'10) | 14 | 9 | |
2012 | TRECO: Dynamic technology remapping for timing engineering change orders | Ho, K.-H.; Jiang, J.-H.R.; Chang, Y.-W.; YAO-WEN CHANG ; JIE-HONG JIANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 8 | 8 | |
2013 | TSV-aware analytical placement for 3-D IC designs based on a novel weighted-average wirelength model | Hsu, M.-K.; Balabanov, V.; Chang, Y.-W.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 68 | 54 | |
2011 | TSV-aware analytical placement for 3D IC designs | Hsu, M.-K.; Chang, Y.-W.; Balabanov, V.; YAO-WEN CHANG | Design Automation Conference | 77 | | |