公開日期 | 標題 | 作者 | 來源出版物 | scopus | WOS | 全文 |
2002 | Comment on "Generic universal switch blocks" | Fan, Hongbing; Wu, Yu-Liang; Chang, Yao-Wen | IEEE Transactions on Computers | | | |
2010 | Compositional dependence of phase formation mechanisms at the interface between titanium and calcia-stabilized zirconia at 1550°C | Chang, Y.-W.; Lin, C.-C.; YAO-WEN CHANG | Journal of the American Ceramic Society | 29 | 23 | |
2008 | Constraint graph-based macro placement for modern mixed-size circuit designs | Chen, H.-C.; Chuang, Y.-L.; Chang, Y.-W.; Chang, Y.-C.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 26 | 0 | |
2003 | Corner sequence: A P-admissible floorplan representation with a worst-case linear-time packing scheme | Lin, Jai-Ming; YAO-WEN CHANG ; Lin, Shih-Ping | IEEE Transactions on Very Large Scale Integration (VLSI) Systems | 42 | 36 | |
2012 | Correlation effects of πelectrons on the band structures of conjugated polymers using the self-consistent GW approximation with vertex corrections | Chang, Y.-W.; BIH-YAW JIN ; YAO-WEN CHANG | Journal of Chemical Physics | 7 | 7 | |
2013 | Coupling-Aware length-ratio-matching routing for capacitor arrays in analog integrated circuits | Ho, K.-H.; Ou, H.-C.; Tsao, H.-F.; YAO-WEN CHANG | Proceedings - Design Automation Conference | 6 | 0 | |
2015 | Coupling-aware length-ratio-matching routing for capacitor arrays in analog integrated circuits | Ho, K.-H.; Ou, H.-C.; Chang, Y.-W.; Tsao, H.-F.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 12 | 11 | |
2011 | Cross-contamination aware design methodology for pin-constrained digital microfluidic biochips | Lin, C.C.-Y.; Chang, Y.-W.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 45 | 33 | |
2010 | Cross-contamination aware design methodology for pin-constrained digital microfluidic biochips | Lin, C.C.-Y.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 25 | 0 | |
2005 | Crosstalk- and Performance-Driven
Multilevel Full-Chip Routing | Ho, Tsung-Yi; Chang, Yao-Wen ; Chen, Sao-Jie ; Lee, Der-Tsai | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | | | |
2005 | Crosstalk- and performance-driven multilevel full-chip routing | Ho, T.-Y.; Chang, Y.-W.; Chen, S.-J.; Lee, D.-T.; YAO-WEN CHANG ; SAO-JIE CHEN | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 48 | 33 | |
2000 | Crosstalk-constrained performance optimization by using wire sizing and perturbation | Pan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG | IEEE International Conference on Computer Design: VLSI in Computers and Processors | 13 | | |
2000 | Crosstalk-Constrained Performance Optimization by Using Wire Sizing and Perturbation. | Pan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the IEEE International Conference On Computer Design: VLSI In Computers & Processors, ICCD '00, Austin, Texas, USA, September 17-20, 2000 | 0 | 0 | |
2000 | Crosstalk-driven interconnect optimization by simultaneous gate andwire sizing. | Jiang, Iris Hui-Ru; Chang, Yao-Wen; YAO-WEN CHANG ; HUI-RU JIANG | IEEE Trans. on CAD of Integrated Circuits and Systems | 49 | 40 | |
2000 | Crosstalkdriven interconnect optimization by simultaneous gate and wire sizing | Jiang, I.H.R.; Chang, Y.W.; Jou, J.Y.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 10 | | |
2006 | Current path analysis for electrostatic discharge protection | Liu, H.-Y.; Lin, C.-W.; Chou, S.-J.; Tu, W.-T.; Liu, C.-H.; Chang, Y.-W.; YAO-WEN CHANG ; SY-YEN KUO ; CHUNG-WEI LIN ; CHIH-HUNG LIU | IEEE/ACM International Conference on Computer-Aided Design | 8 | 0 | |
2006 | Current path analysis for electrostatic discharge protection. | Liu, Hung-Yi; Lin, Chung-Wei; Chou, Szu-Jui; Tu, Wei-Ting; Liu, Chih-Hung; Chang, Yao-Wen; CHUNG-WEI LIN ; SY-YEN KUO ; YAO-WEN CHANG | 2006 International Conference on Computer-Aided Design, ICCAD 2006, San Jose, CA, USA, November 5-9, 2006 | 0 | 0 | |
2016 | Cut redistribution with directed self-assembly templates for advanced 1-D gridded layouts | Lin, Z.-W.; Chang, Y.-W. | Asia and South Pacific Design Automation Conference, ASP-DAC | 16 | 0 | |
2017 | Cut Redistribution with Directed-Self-Assembly Templates for Advanced 1-D Gridded Layouts | Lin, Z.-W.; Chang, Y.-W. | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 0 | 0 | |
2015 | Cutting structure-aware analog placement based on self-aligned double patterning with e-beam lithography | Ou, H.-C.; Tseng, K.-H.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 2 | 0 | |