| Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
| 2018 | Generalized augmented lagrangian and its applications to VLSI global placement | Zhu, Z.; Chen, J.; Peng, Z.; Zhu, W.; Chang, Y.-W. | Design Automation Conference | 15 | 0 | |
| 2017 | Generalized force directed relaxation with optimal regions and its applications to circuit placement | Chang, Y.-W. | International Symposium on Physical Design | 1 | 0 | |
| 2001 | Generic ILP-based approaches for dynamically reconfigurable FPGA partitioning | Wu, G.-M.; Lin, J.-M.; Chao, M.C.-T.; Chang, Y.-W.; YAO-WEN CHANG | Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors | 0 | 0 | |
| 2001 | Generic ILP-based approaches for time-multiplexed FPGA partitioning | Wu, G.-M.; Lin, J.-M.; Chang, Y.-W.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 29 | 21 | |
| 2000 | Generic universal switch blocks | Shyu, M.; Wu, G.-M.; Chang, Y.-D.; Chang, Y.-W.; YAO-WEN CHANG | IEEE Transactions on Computers | 32 | 28 | |
| 1999 | Generic universal switch blocks | Shyu, Michael; Chang, Yu-Dong; Wu, Guang-Ming; Chang, Yao-Wen; YAO-WEN CHANG | IEEE International Conference on Computer Design: VLSI in Computers and Processors | 1 | | |
| 1999 | Generic Universal Switch Blocks. | Shyu, Michael; Chang, Yu-Dong; Wu, Guang-Ming; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the IEEE International Conference On Computer Design, VLSI in Computers and Processors, ICCD '99, Austin, Texas, USA, October 10-13, 1999 | 0 | 0 | |
| 2009 | Global and Detailed Routing | Chen, H.-Y.; Chang, Y.-W.; YAO-WEN CHANG | Electronic Design Automation | 20 | 0 | |
| 2003 | Graph matching-based algorithms for array-based FPGA segmentation design and routing | Lin, J.-M.; Pan, S.-R.; Chang, Y.-W.; YAO-WEN CHANG | Asia and South Pacific Design Automation Conference, ASP-DAC | 2 | 0 | |
| 2003 | Graph matching-based algorithms for array-based FPGA segmentation design and routing. | Lin, Jai-Ming; Pan, Song-Ra; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 2003 | 0 | 0 | |
| 1998 | Graph matching-based algorithms for FPGA segmentation design. | Lin, Jai-Ming; Wong, D. F.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers | 7 | 0 | |
| 2019 | Graph-and ILP-based cut redistribution for two-dimensional directed self-assembly | Wang, Z.-L.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design, Digest of Technical Papers, ICCAD | 0 | 0 | |
| 2017 | Graph-Based Logic Bit Slicing for Datapath-Aware Placement | Huang, C.-C.; Lin, B.-Q.; Lee, H.-Y.; Chang, Y.-W. ; Wu, K.-S.; Yang, J.-Z. | Design Automation Conference | 7 | 0 | |
| 2013 | Graph-based subfield scheduling for electron-beam photomask fabrication | Fang, S.-Y.; Chen, W.-Y.; Chang, Y.-W.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 8 | 7 | |
| 2012 | Graph-based subfield scheduling for electron-beam photomask fabrication | Fang, S.-Y.; Chen, W.-Y.; Chang, Y.-W.; YAO-WEN CHANG | International Symposium on Physical Design | 3 | 0 | |
| 1997 | Graph-theoretic sufficient condition for FPGA/FPIC switch-module routability | Wong, D.F.; Wong, C.K.; YAO-WEN CHANG | IEEE International Symposium on Circuits and Systems | 0 | | |
| 2020 | Hamiltonian path based mixed-cell-height legalization for neighbor diffusion effect mitigation | Chen, J.; Zhu, Z.; Liu, Q.; Zhang, Y.; Zhu, W.; YAO-WEN CHANG | Proceedings - Design Automation Conference | 3 | 0 | |
| 2011 | Heterogeneous B*-trees for analog placement with symmetry and regularity considerations | Chou, P.-Y.; Ou, H.-C.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 24 | 0 | |
| 2011 | Hierarchical placement with layout constraints | Lin, M.P.-H.; Chang, Y.-W.; YAO-WEN CHANG | Analog Layout Synthesis: A Survey of Topological Approaches | 3 | 0 | |
| 2010 | High variation-tolerant obstacle-avoiding clock mesh synthesis with symmetrical driving trees | Shiht, X.-W.; Leet, H.-C.; Hot, K.-H.; Chang, Y.-W.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 23 | 0 | |
