| Issue Date | Title | Author(s) | Source | scopus | WOS | Fulltext/Archive link |
| 2011 | A SAT-based routing algorithm for cross-referencing biochips. | Yuh, Ping-Hung; Lin, Cliff Chiung-Yu; Huang, Tsung-Wei; Ho, Tsung-Yi; Yang, Chia-Lin; YAO-WEN CHANG ; CHIA-LIN YANG | 2011 International Workshop on System Level Interconnect Prediction, SLIP 2011, San Diego, CA, USA, June 5, 2011 | 10 | 0 | |
| 2012 | Self-interaction correction to GW approximation | Chang, Y.-W.; BIH-YAW JIN ; YAO-WEN CHANG | Physica Scripta | 4 | 4 | |
| 2008 | Sensitivity-based multiple-Vt cell swapping for leakage power reduction | Lee, W.-P.; Liu, H.-Y.; Ho, K.-H.; Chang, Y.-W.; YAO-WEN CHANG | 2008 International Symposium on VLSI Design, Automation, and Test, VLSI-DAT | 1 | 0 | |
| 2013 | Simultaneous analog placement and routing with current flow and current density considerations | Ou, H.-C.; Chien, H.-C.C.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 26 | 0 | |
| 2006 | Simultaneous block and I/O buffer floorplanning for flip-chip design | Peng, C.-Y.; Chao, W.-C.; Wang, J.-H.; YAO-WEN CHANG | Asia and South Pacific Design Automation Conference, ASP-DAC | 14 | |  |
| 2002 | Simultaneous Buffer-sizing and Wire-sizing for Clock Trees Based on Lagrangian Relaxation | LEE, YU-MIN; CHEN, CHARLIE CHUNG-PING; YAO-WEN CHANG ; CHUNG-PING CHEN | VLSI Design | 4 | 2 | |
| 2016 | Simultaneous EUV flare variation minimization and CMP control by coupling-aware dummification | Chiang, H.-J.K.; Liu, C.-Y.; Jiang, J.-H.R.; Chang, Y.-W.; YAO-WEN CHANG ; JIE-HONG JIANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 4 | 3 | |
| 2014 | Simultaneous EUV Flare Variation Minimization and CMP Control with Coupling-Aware Dummification | Chi-Yuan Liu; Hui-Ju K. Chiang; Yao-Wen Chang; Jie-Hong R. Jiang; YAO-WEN CHANG ; JIE-HONG JIANG | ACM/IEEE Design Automation Conference (DAC) | 4 | 0 | |
| 2014 | Simultaneous EUV flare- and CMP-aware placement | Liu, C.-Y.; Chang, Y.-W.; YAO-WEN CHANG | 2014 32nd IEEE International Conference on Computer Design, ICCD 2014 | 5 | 0 | |
| 2012 | Simultaneous flare level and flare variation minimization with dummification in EUVL | Fang, S.-Y.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 13 | 0 | |
| 2004 | Simultaneous Floorplan and Buffer-Block Optimization | HUI-RU JIANG ; YAO-WEN CHANG ; Jou, Jing-Yang; Chao, Kai-Yuan | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 10 | 2 | |
| 2003 | Simultaneous floorplanning and buffer block planning | Hui-Ru Jiang, I.; Chang, Y.-W.; Jou, J.-Y.; Chao, K.-Y.; YAO-WEN CHANG | Asia and South Pacific Design Automation Conference, ASP-DAC | 11 | 0 | |
| 2003 | Simultaneous floorplanning and buffer block planning. | Jiang, Iris Hui-Ru; Chang, Yao-Wen; Jou, Jing-Yang; HUI-RU JIANG ; YAO-WEN CHANG | Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 2003 | 0 | 0 | |
| 2003 | Simultaneous floorplanning and buffer block planning. | Jiang, Iris Hui-Ru; Chang, Yao-Wen; Jou, Jing-Yang; Chao, Kai-Yuan; YAO-WEN CHANG | Proceedings of the 2003 Asia and South Pacific Design Automation Conference, ASP-DAC '03, Kitakyushu, Japan, January 21-24, 2003 | 0 | 0 | |
| 2011 | Simultaneous functional and timing ECO | Chang, H.-Y.; Jiang, I.H.-R.; Chang, Y.-W.; YAO-WEN CHANG | Design Automation Conference | 16 | | |
| 2011 | Simultaneous functional and timing ECO. | Chang, Hua-Yu; Jiang, Iris Hui-Ru; Chang, Yao-Wen; YAO-WEN CHANG | Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011 | 16 | 0 | |
| 2011 | Simultaneous functional and timing ECO. | Chang, Hua-Yu; Jiang, Iris Hui-Ru; HUI-RU JIANG ; YAO-WEN CHANG | Proceedings of the 48th Design Automation Conference, DAC 2011, San Diego, California, USA, June 5-10, 2011 | 16 | 0 | |
| 2009 | Simultaneous layout migration and decomposition for double patterning technology | Hsu, C.-H.; Chang, Y.-W.; Nassif, S.R.; YAO-WEN CHANG | IEEE/ACM International Conference on Computer-Aided Design | 26 | | |
| 2011 | Simultaneous layout migration and decomposition for double patterning technology | Hsu, C.-H.; Chang, Y.-W.; Nassif, S.R.; YAO-WEN CHANG | IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 19 | 17 | |
| 2009 | Simultaneous layout migration and decomposition for double patterning technology. | Hsu, Chin-Hsiung; Chang, Yao-Wen; Nassif, Sani R.; YAO-WEN CHANG | 2009 International Conference on Computer-Aided Design, ICCAD 2009, San Jose, CA, USA, November 2-5, 2009 | 26 | 0 | |
